MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 143

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MC68HC708AS48

Manufacturer Part Number
MC68HC708AS48
Description
Advance Information
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
MC68HC708AS48
MOTOROLA
CGMXCLK
INT/BREAK
IAB
NOTE:
Figure 9-16. Stop Mode Recovery from Interrupt or Break
Rev. 4.0
ideal for applications using canned oscillators that do not require long
startup times from stop mode.
External crystal applications should use the full stop recovery time by
clearing the SSREC bit.
A break interrupt during stop mode sets the SIM break stop/wait bit
(SBSW) in the SIM break status register (SBSR).
The SIM counter is held in reset from the execution of the STOP
instruction until the beginning of stop recovery. It is then used to time the
recovery period.
CPUSTOP
NOTE: Previous data can be operand data or the STOP opcode, depending on the last instruction.
STOP +1
R/W
IDB
IAB
System Integration Module (SIM)
STOP ADDR
Figure 9-15. Stop Mode Entry Timing
Figure 9-15
STOP + 2
STOP RECOVERY PERIOD
PREVIOUS DATA
STOP + 2
STOP ADDR + 1
shows stop mode entry timing.
NEXT OPCODE
SP
SP – 1
System Integration Module (SIM)
SAME
SP – 2
SAME
Advance Information
Low-Power Modes
SAME
SP – 3
SAME
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