MC68HC708XL36 FREESCALE [Freescale Semiconductor, Inc], MC68HC708XL36 Datasheet - Page 107

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MC68HC708XL36

Manufacturer Part Number
MC68HC708XL36
Description
HCMOS Microcontroller Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
25-cgm1m_a
MOTOROLA
Other systems refer to acquisition and lock times as the time the system
takes to reduce the error between the actual output and the desired
output to within specified tolerances. Therefore, the acquisition or lock
time varies according to the original error in the output. Minor errors may
not even be registered. Typical PLL applications prefer to use this
definition because the system requires the output frequency to be within
a certain tolerance of the desired frequency regardless of the size of the
initial error.
The discrepancy in these definitions makes it difficult to specify an
acquisition or lock time for a typical PLL. Therefore, the definitions for
acquisition and lock times for this module are as follows:
Obviously, the acquisition and lock times can vary according to how
large the frequency error is and may be shorter or longer in many cases.
Freescale Semiconductor, Inc.
For More Information On This Product,
Acquisition time, t
between the actual output frequency and the desired output
frequency to less than the tracking mode entry tolerance,
Acquisition time is based on an initial frequency error,
(f
control mode (see
Modes
becomes set in the PLL bandwidth control register (PBWC).
Lock time, t
between the actual output frequency and the desired output
frequency to less than the lock mode entry tolerance,
time is based on an initial frequency error, (f
more than 100%. In automatic bandwidth control mode, lock time
expires when the LOCK bit becomes set in the PLL bandwidth
control register (PBWC). (See
Bandwidth Modes
des
– f
Go to: www.freescale.com
orig
on page 90), acquisition time expires when the ACQ bit
)/f
Lock
des
, of not more than 100%. In automatic bandwidth
, is the time the PLL takes to reduce the error
CGM
acq
Manual and Automatic PLL Bandwidth
on page 90.)
, is the time the PLL takes to reduce the error
Manual and Automatic PLL
Acquisition/Lock Time Specifications
des
– f
orig
MC68HC708XL36
)/f
Lock
des
, of not
. Lock
trk
CGM
.
107

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