MC68HC708XL36 FREESCALE [Freescale Semiconductor, Inc], MC68HC708XL36 Datasheet - Page 135

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MC68HC708XL36

Manufacturer Part Number
MC68HC708XL36
Description
HCMOS Microcontroller Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
25-dma_b
MOTOROLA
TEC[2:0] — Transfer Enable Bits
IEC[2:0] — CPU Interrupt Enable Bits
For DMA transfers of one byte or one word, giving the DMA 100% of
the bus bandwidth is appropriate. However, for large,
software-initiated transfers, limiting the bus bandwidth of the DMA
may be useful to keep from slowing CPU activity.
These read/write bits enable the corresponding channels to perform
transfers when DMA service requests occur. When two or more
channels are enabled, a transfer on one channel cannot begin while
another channel is transferring a byte or word. Reset clears the
TEC[2:0] bits.
These read/write bits enable the corresponding channels to generate
CPU interrupt requests upon completion of DMA block transfers or at
the restart of DMA transfer loops. Reset clears the IEC[2:0] bits.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Corresponding DMA channel enabled
0 = Corresponding DMA channel disabled
1 = CPU interrupts from corresponding channel enabled
0 = CPU interrupts from corresponding channel disabled
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DMA
MC68HC708XL36
DMA Registers
DMA
135

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