MC68HC708XL36 FREESCALE [Freescale Semiconductor, Inc], MC68HC708XL36 Datasheet - Page 150

• Manufacturer Part Number: MC68HC708XL36
• Description: HCMOS Microcontroller Unit
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

BRK
Features
Functional Description
MC68HC708XL36
150
When the internal address bus matches the value written in the break
address registers, the break module issues a breakpoint signal to the
CPU. The CPU then loads the instruction register with a software
interrupt instruction (SWI) after completion of the current CPU
instruction. The program counter vectors to $FFFC and $FFFD ($FEFC
and $FEFD in monitor mode).
The following events can cause a break interrupt to occur:
When a CPU- or DMA-generated address matches the contents of the
break address registers, the break interrupt begins after the CPU
completes its current instruction. A return-from-interrupt instruction (RTI)
in the break routine ends the break interrupt and returns the MCU to
normal operation.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Accessible I/O Registers during Break Interrupts
CPU-Generated and DMA-Generated Break Interrupts
Software-Generated Break Interrupts
COP Disabling during Break Interrupts
A CPU-generated address (the address in the program counter)
matches the contents of the break address registers.
During a DMA transfer, a DMA-generated address matches the
contents of the break address registers.
Software writes a logic 1 to the BRKA bit in the break status and
control register.
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Figure 1
BRK
shows the structure of the break module.
MOTOROLA
2-brk_a