MC68HC708XL36 FREESCALE [Freescale Semiconductor, Inc], MC68HC708XL36 Datasheet - Page 156

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MC68HC708XL36

Manufacturer Part Number
MC68HC708XL36
Description
HCMOS Microcontroller Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
BRK
Break Flag Control
Register
MC68HC708XL36
156
Address:
BW is for applications that require a return to wait mode after exiting wait
mode for a DMA-generated break interrupt. BW can be read within the
break interrupt routine. The user can modify the return address on the
stack by subtracting 1 from it. The following code is an example.
;
;
;
;
The break flag control register contains a bit that enables software to
clear status bits while the MCU is in a break state.
BCFE — Break Clear Flag Enable Bit
Reset:
Read:
Write:
This code works if the H register was stacked in the break
interrupt routine. Execute this code at the end of the break
interrupt routine.
HIBYTE EQU
LOBYTE EQU
DOLO
RETURN PULH
This read/write bit enables software to clear status bits by accessing
status registers while the MCU is in a break state. To clear status bits
during the break state, the BCFE bit must be set.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Status bits clearable during break
0 = Status bits not clearable during break
R = Reserved
$FE03
BCFE
Bit 7
If not BW, do RTI
BRCLR BW,BSR, RETURN
TST
BNE
DEC
DEC
RTI
0
Figure 6. Break Flag Control Register (BFCR)
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5
6
LOBYTE,SP
DOLO
HIBYTE,SP
LOBYTE,SP
R
6
BRK
R
5
R
4
;
;
; If RETURNLO is not 0,
; then just decrement low byte.
; Else deal with high byte also.
; Point to WAIT/STOP opcode.
; Restore H register.
See if wait mode or stop mode
was exited by break.
R
3
R
2
R
1
MOTOROLA
Bit 0
8-brk_a
R

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