MC68HC708XL36 FREESCALE [Freescale Semiconductor, Inc], MC68HC708XL36 Datasheet - Page 186

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MC68HC708XL36

Manufacturer Part Number
MC68HC708XL36
Description
HCMOS Microcontroller Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
TIM
I/O Signals
TIM Clock Pin
(TCLK)
TIM Channel I/O
Pins (TCH0–TCH3)
MC68HC708XL36
186
Port E shares five of its pins with the TIM. TCLK is an external clock input
to the TIM prescaler. The four TIM channel I/O pins are TCH0, TCH1,
TCH2, and TCH3.
TCLK is an external clock input that can be the clock source for the TIM
counter instead of the prescaled internal bus clock. Select the TCLK
input by writing logic 1s to the three prescaler select bits, PS[2:0]. See
TIM Status and Control Register
pulse width, TCLK
The maximum TCLK frequency is:
bus frequency
TCLK is available as a general-purpose I/O pin when not used as the
TIM clock input. When the TCLK pin is the TIM clock input, it is an input
regardless of the state of the DDRE3 bit in data direction register E.
Each channel I/O pin is programmable independently as an input
capture pin or an output compare pin. TCH0 and TCH2 can be
configured as buffered output compare or buffered PWM pins.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
2
lmin
TIM
or TCLK
------------------------------------ -
bus frequency
hmin
1
, is:
on page 188. The minimum TCLK
+
t
SU
MOTOROLA
16-tim4_b

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