MC68HC708XL36 FREESCALE [Freescale Semiconductor, Inc], MC68HC708XL36 Datasheet - Page 191

no-image

MC68HC708XL36

Manufacturer Part Number
MC68HC708XL36
Description
HCMOS Microcontroller Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
TIM Counter
Registers
21-tim4_b
MOTOROLA
NOTE:
Address: $0022
DMA0S — DMA Channel 0 Select Bit
The two read-only TIM counter registers contain the high and low bytes
of the value in the TIM counter. Reading the high byte (TCNTH) latches
the contents of the low byte (TCNTL) into a buffer. Subsequent reads of
TCNTH do not affect the latched TCNTL value until TCNTL is read.
Reset clears the TIM counter registers. Setting the TIM reset bit (TRST)
also clears the TIM counter registers.
If you read TCNTH during a break interrupt, be sure to unlatch TCNTL
by reading TCNTL before exiting the break interrupt. Otherwise, TCNTL
retains the value latched during the break.
Reset:
Reset:
Read:
Write:
Read:
Write:
This read/write bit enables TIM DMA service requests on channel 0.
Reset clears the DMA0S bit.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = TIM DMA service requests enabled on channel 0
0 = TIM DMA service requests disabled on channel 0
Bit 15
Figure 6. TIM Counter Registers (TCNTH:TCNTL)
Bit 7
Bit 7
Bit 7
TIM CPU interrupt requests disabled on channel 0
TIM CPU interrupt requests enabled on channel 0
0
0
:
$0023
Go to: www.freescale.com
= Unimplemented
14
6
0
6
6
0
TIM
13
5
0
5
5
0
12
4
0
4
4
0
11
3
0
3
3
0
10
2
0
2
2
0
MC68HC708XL36
1
9
0
1
1
0
I/O Registers
Bit 0
Bit 8
Bit 0
Bit 0
0
0
TIM
191

Related parts for MC68HC708XL36