MC68HC708XL36 FREESCALE [Freescale Semiconductor, Inc], MC68HC708XL36 Datasheet - Page 216

• Manufacturer Part Number: MC68HC708XL36
• Description: HCMOS Microcontroller Unit
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

SPI
MC68HC708XL36
216
The overflow service routine may need to disable the DMA and manually
recover since an overflow indicates the loss of data. Loss of data may
prevent the DMA from reaching its byte count.
If an application requires the DMA to bring the MCU out of wait mode,
enable the OVRF bit to generate CPU interrupt requests. An overflow
condition in wait mode can cause the MCU to hang in wait mode
because the DMA cannot reach its byte count. Setting the error interrupt
enable bit (ERRIE) in the SPI status and control register enables the
OVRF bit to bring the MCU out of wait mode.
If the CPU SPRF interrupt is enabled and the OVRF interrupt is not,
watch for an overflow condition.
miss an overflow. The first part of
read the SPSCR and SPDR to clear the SPRF without problems.
However, as illustrated by the second transmission example, the OVRF
bit can be set in between the time that SPSCR and SPDR are read.
SPI RECEIVE
COMPLETE
DMA READ
Freescale Semiconductor, Inc.
OF SPDR
For More Information On This Product,
OVRF
SPRF
Figure 9. Overflow Condition with DMA Service of SPRF
1
2
3
BYTE 1
DMA READS BYTE 1, CLEARING SPRF BIT.
BYTE 1 TRANSFERS FROM SHIFT
REGISTER TO DATA REGISTER,
SETTING SPRF BIT.
BYTE 2 TRANSFERS FROM SHIFT
REGISTER TO DATA REGISTER,
SETTING SPRF BIT.
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1
2
SPI
BYTE 2
3
Figure 10
Figure 10
BYTE 3
4
4
5
6
BYTE 3 CAUSES OVERFLOW. BYTE 3 IS LOST.
DMA READS BYTE 2, CLEARING SPRF BIT.
BYTE 4 IS LOST. NO NEW SPRF DMA SERVICE
REQUESTS AND NO TRANSFERS TO DATA
REGISTER UNTIL OVRF IS CLEARED.
shows how it is possible to
shows how it is possible to
5
BYTE 4
6
MOTOROLA
BYTE 5
16-spi_c