MC68HC708XL36 FREESCALE [Freescale Semiconductor, Inc], MC68HC708XL36 Datasheet - Page 221

no-image

MC68HC708XL36

Manufacturer Part Number
MC68HC708XL36
Description
HCMOS Microcontroller Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Interrupts
21-spi_c
MOTOROLA
Four SPI status flags can be enabled to generate CPU interrupt requests
or DMA service requests:
The DMA select bit (DMAS) controls whether SPTE and SPRF generate
CPU interrupt requests or DMA service requests. When DMAS = 0,
reading the SPI status and control register with SPRF set and then
reading the receive data register clears SPRF. When DMAS = 1, any
read of the receive data register clears the SPRF flag. The clearing
mechanism for the SPTE flag is always just a write to the transmit data
register.
The SPI transmitter interrupt enable bit (SPTIE) enables the SPTE flag
to generate transmitter CPU interrupt requests or transmitter DMA
service requests, provided that the SPI is enabled (SPE = 1).
The SPI receiver interrupt enable bit (SPRIE) enables the SPRF bit to
generate receiver CPU interrupt requests or receiver DMA service
requests, regardless of the state of the SPE bit. (See
Mode Fault
Freescale Semiconductor, Inc.
Transmitter
Flag
Receiver
Overflow
For More Information On This Product,
MODF
Empty
OVRF
SPTE
SPRF
Full
Go to: www.freescale.com
SPI Transmitter CPU Interrupt Request (DMAS = 0, SPTIE = 1,SPE = 1)
SPI Transmitter DMA Service Request (DMAS = 1, SPTIE = 1, SPE = 1)
SPI Receiver CPU Interrupt Request (DMAS = 0, SPRIE = 1)
SPI Receiver DMA Service Request (DMAS = 1, SPRIE = 1)
SPI Receiver/Error Interrupt Request (ERRIE = 1)
SPI Receiver/Error Interrupt Request (ERRIE = 1)
SPI
Conditions for Enabling Interrupt Request
Table 3. SPI Interrupts
Figure
MC68HC708XL36
12.)
Interrupts
221
SPI

Related parts for MC68HC708XL36