MC68HC708XL36 FREESCALE [Freescale Semiconductor, Inc], MC68HC708XL36 Datasheet - Page 276

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MC68HC708XL36

Manufacturer Part Number
MC68HC708XL36
Description
HCMOS Microcontroller Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
SCI
MC68HC708XL36
276
NF — Receiver Noise Flag Bit
FE — Receiver Framing Error Bit
This clearable, read-only bit is set when the SCI detects noise on the
RxD pin. NF generates an NF CPU interrupt request if the NEIE bit in
SCC3 is also set. Clear the NF bit by reading SCS1 and then reading
the SCDR. Reset clears the NF bit.
This clearable, read-only bit is set when a logic 0 is accepted as the
stop bit. FE generates an SCI error CPU interrupt request if the FEIE
bit in SCC3 also is set. Clear the FE bit by reading SCS1 with FE set
and then reading the SCDR. Reset clears the FE bit.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Noise detected
0 = No noise detected
1 = Framing error detected
0 = No framing error detected
BYTE 1
BYTE 1
Go to: www.freescale.com
READ SCS1
READ SCDR
SCRF = 1
Figure 15. Flag Clearing Sequence
BYTE 1
OR = 0
SCI
READ SCDR
READ SCS1
DELAYED FLAG CLEARING SEQUENCE
NORMAL FLAG CLEARING SEQUENCE
BYTE 2
BYTE 2
SCRF = 1
BYTE 1
OR = 0
READ SCDR
READ SCS1
SCRF = 1
BYTE 2
OR = 0
BYTE 3
BYTE 3
READ SCDR
READ SCDR
READ SCS1
READ SCS1
SCRF = 1
SCRF = 1
BYTE 3
BYTE 3
OR = 1
OR = 0
BYTE 4
BYTE 4
MOTOROLA
42-sci_d

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