MC68HC708XL36 FREESCALE [Freescale Semiconductor, Inc], MC68HC708XL36 Datasheet - Page 312

• Manufacturer Part Number: MC68HC708XL36
• Description: HCMOS Microcontroller Unit
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

IRQ
Features
Functional Description
MC68HC708XL36
312
Features of the IRQ module include the following:
A logic 0 applied to any of the external interrupt pins can latch a CPU
interrupt request. Figure 1 shows the structure of the IRQ module.
Interrupt signals on the IRQ1 pin are latched separately from interrupt
signals on the IRQ2 pin. CPU interrupt requests remain latched until one
of the following actions occurs:
All of the external interrupt pins are falling-edge-triggered and are
software-configurable to be both falling-edge and low-level-triggered.
The MODE1 bit in the ISCR controls the triggering sensitivity of the IRQ1
pin. The MODE2 bit controls the triggering sensitivity of the IRQ2 pin.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Two Dedicated External Interrupt Pins with Separate External
Interrupt Masks
Hysteresis Buffers
Programmable Edge-Only or Edge- and Level- Interrupt Sensitivity
Automatic Interrupt Acknowledge
Exit from Low-Power Modes
Vector fetch — A vector fetch automatically generates an interrupt
acknowledge signal that clears the CPU interrupt request that
caused the vector fetch.
Software clear — Software can clear a latched CPU interrupt
request by writing to the appropriate acknowledge bit in the
interrupt status and control register (ISCR). Writing a logic 1 to the
ACK1 bit clears the IRQ1 CPU interrupt request. Writing a logic 1
to the ACK2 bit clears the IRQ2 CPU interrupt request.
Reset — A reset automatically clears both IRQ1 and IRQ2 CPU
interrupt requests.
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IRQ
MOTOROLA
2-intirq2_a