MC68HC708XL36 FREESCALE [Freescale Semiconductor, Inc], MC68HC708XL36 Datasheet - Page 40

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MC68HC708XL36

Manufacturer Part Number
MC68HC708XL36
Description
HCMOS Microcontroller Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
CONFIG
MC68HC708XL36
40
NOTE:
NOTE:
COPRS — COP Rate Select Bit
LVISTOP — LVI Enable in Stop Mode Bit
If the LVIPWRD bit is at logic 0, the LVISTOP bit must be at logic 0 to
meet the minimum stop mode I
LVIRSTD — LVI Reset Disable Bit
LVIPWRD — LVI Power Disable Bit
SSREC — Short Stop Recovery Bit
Do not set the SSREC bit if using an external crystal oscillator.
STOP — STOP Instruction Enable Bit
COPD — COP Disable Bit
COPRS selects the COP timeout period. Reset clears COPRS.
When the LVIPWRD bit is clear, setting the LVISTOP bit enables the
LVI to operate during stop mode. Reset clears LVISTOP.
When the LVIPWRD bit is clear, setting the LVIRSTD bit disables the
reset signal from the LVI module. Reset clears LVRSTD.
LVIPWRD disables LVI. Reset clears LVIPWRD.
SSREC shortens stop mode recovery time from 4096 CGMXCLK
cycles to 32 CGMXCLK cycles. Reset clears SSREC.
STOP enables the STOP instruction. Reset clears STOP.
COPD disables the COP module. Reset clears COPD.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = COP timeout period = 2
0 = COP timeout period = 2
1 = LVI enabled during stop mode
0 = LVI disabled during stop mode
1 = LVI module reset disabled
0 = LVI module reset enabled
1 = LVI power disabled
0 = LVI power enabled
1 = Stop mode recovery after 32 CGMXCLK cycles
0 = Stop mode recovery after 4096 CGMXCLK cycles
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
1 = COP module disabled
0 = COP module enabled
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CONFIG
DD
13
18
specification.
– 2
– 2
4
4
CGMXCLK cycles
CGMXCLK cycles
MOTOROLA
2-mor_a

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