MC68HC708XL36 FREESCALE [Freescale Semiconductor, Inc], MC68HC708XL36 Datasheet - Page 49

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MC68HC708XL36

Manufacturer Part Number
MC68HC708XL36
Description
HCMOS Microcontroller Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
CPU During Break Interrupts
Instruction Set Summary
9-cpu8_a
MOTOROLA
ADC # opr
ADC opr
ADC opr
ADC opr ,X
ADC opr ,X
ADC ,X
ADC opr ,SP
ADC opr ,SP
ADD # opr
ADD opr
ADD opr
ADD opr ,X
ADD opr ,X
ADD ,X
ADD opr ,SP
ADD opr ,SP
AIS # opr
AIX # opr
AND # opr
AND opr
AND opr
AND opr ,X
AND opr ,X
AND ,X
AND opr ,SP
AND opr ,SP
Source
Form
Add with Carry
Add without Carry
Add Immediate Value (Signed) to SP
Add Immediate Value (Signed) to H:X
Logical AND
Operation
If the break module is enabled, a break interrupt causes the CPU to
execute the software interrupt instruction (SWI) at the completion of the
current CPU instruction. (See
program counter vectors to $FFFC–$FFFD ($FEFC–$FEFD in monitor
mode).
If the break interrupt has been deasserted, a return-from-interrupt
instruction (RTI) in the break routine ends the break interrupt and returns
the MCU to normal operation.
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 1. Instruction Set Summary
Go to: www.freescale.com
H:X
SP
A
Description
A
A
CPU
(A) + (M) + (C)
(SP) + (16
(H:X) + (16
(A) & (M)
(A) + (M)
Break Module
«
«
M)
M)
V H I N Z C
– – – – – – IMM
– – – – – – IMM
0 – –
Effect on
CCR
on page 149.) The
CPU During Break Interrupts
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
MC68HC708XL36
9EDB
9EE9
9ED9
9EEB
9EE4
9ED4
CB
DB
A9
B9
C9
D9
E9
AB
BB
EB
FB
A7
AF
A4
B4
C4
D4
E4
F9
F4
ii
dd
hh ll
ee ff
ff
ff
ee ff
ii
dd
hh ll
ee ff
ff
ff
ee ff
ii
ii
ii
dd
hh ll
ee ff
ff
ff
ee ff
CPU
49
2
3
4
4
3
2
4
5
2
3
4
4
3
2
4
5
2
2
2
3
4
4
3
2
4
5

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