MC68HC711D3CFB2 FREESCALE [Freescale Semiconductor, Inc], MC68HC711D3CFB2 Datasheet - Page 134
MC68HC711D3CFB2
Manufacturer Part Number
MC68HC711D3CFB2
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC68HC711D3CFB2.pdf
(138 pages)
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MC68L11D0
B.2.5 Expansion Bus Timing
134
Num
1. V
2. Input clocks with duty cycles other than 50% affect bus performance. Timing parameters affected by input clock duty cycle
4A
4B
12
17
18
19
21
22
24
25
26
27
28
29
35
36
1
2
3
9
otherwise noted.
are identified by (a) and (b). To recalculate the approximate bus timing values, substitute the following expressions in place
of 1/8 t
Where:
DD
Frequency of operation (E-clock frequency)
Cycle time
Pulse width, E low, PW
Pulse width, E high, PW
E and AS rise time
E and AS fall time
Address hold time
Non-muxed address valid time to E rise
Read data setup time
Read data hold time (max = t
Write data delay time, t
Write data hold time, t
Muxed address valid time to E rise
Muxed address valid time to AS fall
Muxed address hold time, t
Delay time, E to AS rise, t
Pulse width, AS high, PW
Delay time, AS to E rise, t
MPU address access time
MPU access time , t
Muxed address delay (previous cycle MPU read)
(a) (1-dc) × 1/4 t
(b) dc × 1/4 t
DC is the decimal value of duty cycle percentage (high time).
= 3.0 Vdc to 5.5 Vdc, V
t
t
t
t
t
AV
AVM
ASL
ACCA
MAD
CYC
= PW
= PW
= PW
= t
= t
in the above formulas, where applicable:
ASD
cyc
EL
ASH
EL
CYC
– (t
– (PW
+ 30 ns
– (t
– 70 ns
ASD
CYC
(2)a
ASD
EL
ACCE
, t
+ 80 ns)
(2)a
DHW
– t
+ 90 ns)
Characteristic
EL
DDW
AH
EH
SS
AVM
ASH
ASD
ASED
= PW
= 1/2 t
(2)a
= 1/8 t
= 1/8 t
AHL
= 1/2 t
= 1/8 t
= 0 Vdc, T
) – t
MAD
(2)a
= 1/8 t
= 1/4 t
(2)a
= 1/8 t
= 1/8 t
EH
cyc
DSR
cyc
)
cyc
cyc
cyc
– t
— 23 ns
– 29.5 ns
cyc
cyc
– 29.5 ns
– 28 ns
– t
DSR
MC68HC711D3 Data Sheet, Rev. 2.1
+ 65.5 ns
cyc
cyc
(1)
A
f
– 9.5 ns
– 29 ns
= T
– 29.5 ns
– 9.5 ns
L
to T
(2)a
(2)a
(2)a
H
(2)b
(2)b
. All timing is shown with respect to 20% V
Symbol
PW
PW
PW
t
t
t
t
t
t
t
t
t
t
ASED
ACCA
ACCE
t
t
DDW
DHW
t
MAD
t
DSR
DHR
AVM
ASD
t
ASL
AHL
f
cyc
AH
AV
t
t
O
ASH
r
f
EH
EL
1000
Min
475
470
275
265
150
120
220
120
735
150
dc
95
30
95
95
—
—
—
—
0
1.0 MHz
Max
150
195
440
1.0
25
25
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
DD
Freescale Semiconductor
and 70% V
Min
500
225
220
298
dc
33
88
30
33
78
25
33
58
95
58
88
—
—
—
—
0
2.0 MHz
Max
133
190
2.0
25
25
88
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
DD
, unless
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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