MC68HC711D3CFB2 FREESCALE [Freescale Semiconductor, Inc], MC68HC711D3CFB2 Datasheet - Page 73

• Manufacturer Part Number: MC68HC711D3CFB2
• Description: Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

SCP1 and SCP0 — SCI Baud Rate Prescaler Select Bits
SCR2–SCR0 — SCI Baud Rate Select Bits
Freescale Semiconductor
These two bits select a prescale factor for the SCI baud rate generator that determines the highest
possible baud rate.
These three bits select receiver and transmitter bit rate based on output from baud rate prescaler
stage.
The prescale bits, SCP1 and SCP0, determine the highest baud rate and the SCR2–SCR0 bits select
an additional binary submultiple (÷1, ÷2, ÷4, through ÷128) of this highest baud rate. The result of these
two dividers in series is the 16 X receiver baud rate clock. The SCR2–SCR0 bits are not affected by
reset and can be changed at any time, although they should not be changed when any SCI transfer is
in progress.
Figure 6-8
baud rate. The rate select bits determine additional divide by two stages to arrive at the receiver timing
(RT) clock rate. The baud rate clock is the result of dividing the RT clock by 16.
illustrates the SCI baud rate timing chain. The prescale select bits determine the highest
and SCP0
SCP1
SCR2–SCR0
0 0
0 1
1 0
1 1
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Internal Clock
Divide
Table 6-1. Baud Rate Prescale Selects
By
13
1
3
4
Prescaler
Divide
MC68HC711D3 Data Sheet, Rev. 2.1
Table 6-2. Baud Rate Selects
128
By
16
32
64
1
2
4
8
15.625 K
4.0 MHz
62.50 K
20.83 K
(Baud)
4800
4800
2400
4800
1200
600
300
150
—
—
(Prescaler Output from
Crystal Frequency in MHz
8.0 MHz
31.25 K
125.0 K
41.67 K
(Baud)
9600
Highest Baud Rate
9600
9600
4800
2400
1200
600
300
150
—
10.0 MHz
156.25 K
52.08 K
12.02 K
(Baud)
38.4 K
Table
38.4 K
38.4 K
19.2 K
6-1)
9600
4800
2400
1200
12.0 MHz
600
300
187.5 K
46.88 K
14.42 K
(Baud)
62.5 K
SCI Registers
73