LAN83C180_01 SMSC [SMSC Corporation], LAN83C180_01 Datasheet
LAN83C180_01
Related parts for LAN83C180_01
LAN83C180_01 Summary of contents
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Fast Ethernet PHY Transceiver Single Chip 100Base-TX/10Base-T Ethernet Physical Layer (PHY) Solution Dual Speed – 10/100 Mbps Full MII Interface for a Glueless MAC Connection MI Interface for Configuration and Status Half Duplex and Full Duplex in Both 10BASE-T ...
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STANDARD MICROSYSTEMS CORPORATION (SMSC) 80 Arkay Drive Hauppauge, NY 11788 (631) 435-6000 FAX (631) 273-3123 Standard Microsystems is a registered trademark of Standard Microsystems Corporation, and SMSC is a trademark of Standard Microsystems Corporation. Product names and company ...
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FEATURES ................................................................................................................................................................... 1 GENERAL DESCRIPTION............................................................................................................................................ 1 PIN CONFIGURATION ................................................................................................................................................. 4 DESCRIPTION OF PIN FUNCTIONS ........................................................................................................................... 5 FUNCTIONAL DESCRIPTION...................................................................................................................................... 7 25MHz Reference Clock ............................................................................................................................................ 7 10BASE-T OPERATION ............................................................................................................................................... 7 10Mb/s Data Transfer on the MII ............................................................................................................................... 7 RX10 Clock Recovery................................................................................................................................................ 7 ...
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MINT MINT Fast Ethernet MAC (LAN91C100FD, LAN91C110, LAN83C171, or other MII compliant MAC) SMSC DS – LAN83C180 PIN CONFIGURATION FIGURE 1 – SYSTEM BLOCK DIAGRAM Page 4 Rev. 08/24/2001 ...
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PIN # NAME 19 RXIN 18 RXIP 25 TXON 26 TXOP 33 TXREF10 34 TXREF100 13 nRESET 41 XTAL1 40 XTAL2 46 MDC 45 MDIO 52 RX_CLK 55,56,57,5 RXD0,RXD1,RXD2, 8 RXD3 51 RX_DV 59 RX_ER 1 TX_CLK 60,61,62,6 TXD0,TXD1,TXD2,T 3 ...
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PIN # NAME 8 COLST/MINT 5 LNKST MINT 9, 47, 54 DVDD1, DVDD3, DVDD2 11, 14, 20, RXVDD3, RXVDD2, 24, 36, 37 RXVDD1, TXVDD1, TXVDD3, TXVDD4 2, 44, 53 DGND1, DGND3, DGND2 10, 15, 17, RXGND3, RXGND2, ...
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FUNCTIONAL DESCRIPTION The LAN83C180 has three basic operating modes: 10BASE-T mode, 100BASE-TX mode and LOW-POWER mode. The modes are selected by bits 11 and 13 respectively in register 0. The Control block is designed to manage these modes by starting ...
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RX10 Latency When connected to appropriate magnetics the latency through the RX10 path is less than 6BT (600ns). This timing is measured from the input of the receive magnetics to the falling edge of RX_CLK. The RX10 path may ignore ...
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No data is passed to the MII interface until lock is established. RX100 SIPO, Decoder and Descrambler The RX100 SIPO, ...
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CONTROLS Initialization, mode selection and other options are governed by the control inputs and register as described in the following paragraphs. Initialization (nRESET) The LAN83C180 incorporates a power-on-reset circuit for self-initialization on power-up. During initialization the open-drain nRESET pin is ...
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A false CRS event happens if, at the beginning of a carrier event, the JK symbols are not received correctly. When the LAN83C180 is in 100M mode it will count all false CRS events in register 27 bits 7:0. This ...
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SMSC DS – LAN83C180 FIGURE 2 – LAN83C180 BLOCK DIAGRAM Page 12 Rev. 08/24/2001 ...
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MANAGEMENT MAC Access to PHY Management Registers The interface to these registers is via the MDC and MDIO signals. The address of the LAN83C180 is specified by the PA<4:0> static inputs. The MD command is issued by the MAC and ...
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Reg 1 - Status Register BIT BIT NAME 15 100BaseT4 1 = PHY able to perform 100BaseT4 0 = PHY not able to perform 100BaseT4 14 100Base- PHY able to perform 100Base-TX – FDX 0 = PHY not ...
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Reg 5 - ANEG Link Partner Ability Register BIT BIT NAME ACK 13 Remote Fault 12:5 Ability 4:0 Selector Field Reg 6 - ANEG Expansion Register BIT BIT NAME 15:5 Reserved 4 Parallel Detect Fault 3 Link ...
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Reg 24 - LAN83C180 Specific Register BIT BIT NAME 15:14 Test Access 13 LED Control 12 MINT POL 11 Pol Dis 10 SQE Disable 9 JAB Disable 8 Loop 10 7 Force RX 6 Force TX 5 CRS_CTL 4 MF ...
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Reg 27 - False Carrier Event Counter BIT BIT NAME 15 Disconnect 14:18 Reserved 7:0 False CRS counter Reg 28 - Counter Test Register BIT BIT NAME 15:0 Reserved SMSC DS – LAN83C180 DESCRIPTION The disconnect mechanism status Number of ...
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OPERATING CONDITIONS MAXIMUM GUARANTEED RATINGS* Operating Temperature Range .................................................................................................................0 Storage Temperature Range ...............................................................................................................-40 Lead Temperature Range (soldering, 10 seconds) .......................................................................................... +TBD Positive Voltage on any pin, with respect to Ground ..................................................................................... V Negative Voltage on any pin, with respect to ...
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AC ELECTRICAL CHARACTERISTICS Recommended operating conditions apply except where stated. CHARACTERISTIC REFCLK Frequency Duty cycle RX_CLK Frequency Duty cycle Frequency Duty cycle TX_CLK Frequency Duty cycle Frequency Duty cycle MDC Frequency Minimum high/low SMSC DS – LAN83C180 VALUE MIN MAX ...
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EXTERNAL COMPONENTS Connecting an External 25MHz Reference If an external clock is used then it should be driven into the REFCLK input, and XTAL1 must be connected to OSCVDD. XTAL2 must be left unconnected. nRESET Pull-up Resistor This resistor is ...
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PACKAGE DETAILS Dimensions are shown: mm (in). 64-LEAD THIN QUAD PLASTIC FLATPACK - TQFP ( 1.0mm) FIGURE 4 – LAN83C180 PACKAGE OUTLINE SMSC DS – LAN83C180 Page 21 Rev. 08/24/2001 ...
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PAGE(S) SECTION/FIGURE/ENTRY 14 Reg 3 - LAN83C180 Identifier Register 5 Description of Pin Functions 11 ICFG Interrupt 16 Reg. 21, Reg Pin Configuration 4 Figure Description of Pin Functions 10 First Paragraph under Block Table ...