MC68HC711E20CFS2 MOTOROLA [Motorola, Inc], MC68HC711E20CFS2 Datasheet - Page 115

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MC68HC711E20CFS2

Manufacturer Part Number
MC68HC711E20CFS2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
M68HC11E Family — Rev. 5
MOTOROLA
Full-
output
hand-
shake
mode
Read
PIOC with
STAF = 1
then write
PORTCL
Sequence
Clearing
STAF
STAF — Strobe A Interrupt Status Flag
STAI — Strobe A Interrupt Enable Mask Bit
CWOM — Port C Wired-OR Mode Bit (affects all eight port C pins)
HNDS — Handshake Mode Bit
OIN — Output or Input Handshake Select Bit
HNDS
STAF is set when the selected edge occurs on strobe A. This bit can be cleared
by a read of PIOC with STAF set followed by a read of PORTCL (simple strobed
or full input handshake mode) or a write to PORTCL (output handshake mode).
It is customary to have an external pullup resistor on lines that are driven by
open-drain devices.
HNDS must be set to 1 for this bit to have meaning.
Address:
1
Reset:
Read:
Write:
0 = No edge on strobe A
1 = Selected edge on strobe A
0 = STAF does not request interrupt
1 = STAF requests interrupt
0 = Port C outputs are normal CMOS outputs.
1 = Port C outputs are open-drain outputs.
0 = Simple strobe mode
1 = Full input or output handshake mode
0 = Input handshake
1 = Output handshake
Freescale Semiconductor, Inc.
Table 6-2. Parallel I/O Control (Continued)
For More Information On This Product,
OIN
U = Unaffected
1
$1002
Figure 6-10. Parallel I/O Control Register (PIOC)
STAF
Bit 7
0
0 = STRB
active level
1 = STRB
active pulse
Parallel Input/Output (I/O) Ports
Go to: www.freescale.com
PLS
STAI
6
0
CWOM
Follow
DDRC
0
1
5
0
Active Edge
Port C
Driven
EGA
STRA
HNDS
4
0
Follow
DDRC
OIN
3
0
Driven as outputs if
STRA at active
level; follows
DDRC
if STRA not at
active level
Parallel Input/Output (I/O) Ports
Port B
Parallel I/O Control Register
PLS
U
2
EGA
1
1
Normal output
port, unaffected
in handshake
modes
Port C
Data Sheet
INVB
Bit 0
1
115

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