MC68HC711E20CFS2 MOTOROLA [Motorola, Inc], MC68HC711E20CFS2 Datasheet - Page 155

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MC68HC711E20CFS2

Manufacturer Part Number
MC68HC711E20CFS2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
9.4.9 Timer Interrupt Mask 2 Register
M68HC11E Family — Rev. 5
MOTOROLA
NOTE:
Use this 8-bit register to enable or inhibit timer overflow and real-time interrupts.
The timer prescaler control bits are included in this register.
TOI — Timer Overflow Interrupt Enable Bit
RTII — Real-Time Interrupt Enable Bit
PAOVI — Pulse Accumulator Overflow Interrupt Enable Bit
PAII — Pulse Accumulator Input Edge Interrupt Enable Bit
Bits [3:2] — Unimplemented
PR[1:0] — Timer Prescaler Select Bits
Bits in TMSK2 correspond bit for bit with flag bits in TFLG2. Bits in TMSK2 enable
the corresponding interrupt sources.
Refer to
Refer to
Refer to
Always read 0
These bits are used to select the prescaler divide-by ratio. In normal modes,
PR[1:0] can be written only once, and the write must be within 64 cycles after
reset. Refer to
Address:
Reset:
Read:
Write:
0 = TOF interrupts disabled
1 = Interrupt requested when TOF is set to 1
Freescale Semiconductor, Inc.
For More Information On This Product,
9.5 Real-Time Interrupt
9.7.3 Pulse Accumulator Status and Interrupt
9.7.3 Pulse Accumulator Status and Interrupt
$1024
Figure 9-19. Timer Interrupt Mask 2 Register (TMSK2)
Bit 7
TOI
0
Go to: www.freescale.com
Table 9-1
= Unimplemented
RTII
6
0
Timing System
PR[1:0]
Table 9-4. Timer Prescale
and
0 0
0 1
1 0
1 1
PAOVI
5
0
Table 9-4
(RTI).
PAII
4
0
for specific timing values.
Prescaler
3
0
16
1
4
8
2
0
Bits.
Bits.
PR1
Output Compare
1
0
Timing System
Data Sheet
Bit 0
PR0
0
155

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