MC68HC711E20CFS2 MOTOROLA [Motorola, Inc], MC68HC711E20CFS2 Datasheet - Page 181

no-image

MC68HC711E20CFS2

Manufacturer Part Number
MC68HC711E20CFS2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
M68HC11E Family — Rev. 5
MOTOROLA
PORT C (OUT)
Notes:
PORT C (OUT)
NOTES:
STRB (OUT)
1. After reading PIOC with STAF set
2. Figure shows rising edge STRA (EGA = 1) and high true STRB (INVB = 1).
STRB (IN)
STRA (IN)
1. After reading PIOC with STAF set
2. Figure shows rising edge STRA (EGA = 1) and high true STRB (INVB = 1).
STRA (IN)
Notes:
PORT C (OUT)
PORT C (OUT)
PORT C (OUT)
PORT C (OUT)
PORT C (OUT)
PORT C (OUT)
NOTES:
Figure 10-13. 3-State Variation of Output Handshake Timing Diagram
STRB (OUT)
1. After reading PIOC with STAF set
2. Figure shows rising edge STRA (EGA = 1) and high true STRB (INVB = 1).
STRB (OUT)
1. After reading PIOC with STAF set
2. Figure shows rising edge STRA (EGA = 1) and high true STRB (INVB = 1).
STRA (IN)
STRA (IN)
E
(DDR = 1)
STRA (IN)
(DDR = 0)
STRA (IN)
(DDR = 0)
E
DDR = 1
DDR = 0
DDR = 0
PREVIOUS PORT DATA
PREVIOUS PORT DATA
Figure 10-12. Port C Output Handshake Timing Diagram
E
E
b) STRA ACTIVE AFTER PORTCL WRITE
a) STRA ACTIVE BEFORE PORTCL WRITE
b) STRA ACTIVE AFTER PORTCL WRITE
a) STRA ACTIVE BEFORE PORTCL WRITE
WRITE PORTCL
Freescale Semiconductor, Inc.
READ PORTCL
WRITE PORTCL
READ PORTCL
For More Information On This Product,
OLD DATA
t
t
OLD DATA
PCD
PCD
(STRA Enables Output Buffer)
t
(1)
t
1
PWD
t
PWD
1
(1)
t
PWD
PWD
Go to: www.freescale.com
Electrical Characteristics
NEW DATA VALID
NEW DATA VALID
t
t
DEB
DEB
NEW DATA VALID
NEW DATA VALID
t
t
DEB
DEB
t
t
PCD
PCD
"READY"
“READY”
NEW DATA VALID
t
t
AES
AES
NEW DATA VALID
“READY”
"READY"
MC68L11E9/E20 Peripheral Port Timing
t
t
t
t
t
PCH
PCH
PCH
PCH
PCH
t
t
DEB
t
DEB
t
t
AES
t
t
t
AES
PCZ
PCZ
PCZ
PCZ
Electrical Characteristics
PORT C OUTPUT HNDSHK TIM
t
t
DEB
DEB
Data Sheet
181

Related parts for MC68HC711E20CFS2