MC68HC711G5 MOTOROLA [Motorola, Inc], MC68HC711G5 Datasheet - Page 118

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MC68HC711G5

Manufacturer Part Number
MC68HC711G5
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
9.7.1
READ:
WRITE:
RESET:
CCF — Conversions Complete Flag
CONV8 — Convert 8/Convert 4 Select Bit
SCAN — Continuous Scan Control
MULT — Multiple Channel/Single Channel Control
CD, CC, CB, CA — Channel Select Bits
MOTOROLA
9-6
9.7
REGISTERS
A/D Control and Status Register (ADCTL)
RESET:
Any time.
Any time except writes always clear bit 7.
Indeterminate.
This flag bit is set automatically after an A/D conversion cycle (four or eight conversions,
depending on which conversion mode is selected). If a continuous scan mode is
selected, the CCF flag will become set after the first time all four (or eight) registers have
been updated, and it will remain set until the ADCTL register is again written. Each time
the ADCTL register is written, this bit is automatically cleared to zero, any current
conversion is aborted and a new conversion sequence is started.
0 – Convert 4 channels or one channel 4 times (uses 4 result registers).
1 – Convert 8 channels or one channel 8 times, (uses all 8 result registers).
0 – Perform selected number of conversions (4 or 8) and stop.
1 – Convert continuously.
0 – Convert single channel selected.
1 – Convert the selected number of channels (4 or 8).
When 4-conversion (CONV8 = 0) and multiple channel (MULT=1) modes are selected,
the CB and CA bits have no meaning or effect, and the CD and CC bits specify which of
four groups of four channels are to be converted. When 8-conversion (CONV8 = 1) and
multiple channel (MULT=1) modes are selected, the CC, CB and CA bits have no
meaning or effect. (Refer to Table 9-1 for a list of the A/D channel assignments.)
$1030
Undefined
CCF
7
CONV8
6
ANALOG-TO-DIGITAL CONVERTER
SCAN
5
MULT
4
CD
3
CC
2
CB
1
CA
0
ADCTL
MC68HC11G5

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