MC68HC711G5 MOTOROLA [Motorola, Inc], MC68HC711G5 Datasheet - Page 129

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MC68HC711G5

Manufacturer Part Number
MC68HC711G5
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
MC68HC11G5
PPOL3 — Pulse Width Channel 3 Polarity
PPOL2 — Pulse Width Channel 2 Polarity
PPOL1 — Pulse Width Channel 1 Polarity
10.5.6 Scale Register (PWSCAL)
READ:
WRITE:
RESET:
Each of the PWM channels can select clock S (scaled) as its input clock. Clock S may be selected
for channel x by writing a one to the control bit PCLKx. Clock S is generated by taking clock A,
dividing it by the value in this PWSCAL register and dividing that by two. When PWSCAL = $00, clock
A is divided by 256 then divided by two to generate clock S. In test mode, the PWSCAL register can
be used to read the value of clock S (scaled) if the TPWSL bit in the TEST1 register is set.
RESET:
$1062
1 – PWM channel 3 output is high at the beginning of the clock cycle, then goes low
0 – PWM channel 3 output is low at the beginning of the clock cycle, then goes high
1 – PWM channel 2 output is high at the beginning of the clock cycle, then goes low
0 – PWM channel 2 output is low at the beginning of the clock cycle, then goes high
1 – PWM channel 1 output is high at the beginning of the clock cycle, then goes low
0 – PWM channel 1 output is low at the beginning of the clock cycle, then goes high
Any time.
Any time (causes clock counter to be reset to $00).
$00
when the duty count is reached.
when the duty count is reached.
when the duty count is reached.
when the duty count is reached.
when the duty count is reached.
when the duty count is reached.
BIT7
7
0
BIT6
6
0
PULSE WIDTH MODULATION TIMER
BIT5
5
0
BIT4
4
0
BIT3
3
0
BIT2
2
0
BIT1
1
0
BIT0
0
0
PWSCAL
MOTOROLA
10-9

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