MC68HC711G5 MOTOROLA [Motorola, Inc], MC68HC711G5 Datasheet - Page 147

• Manufacturer Part Number: MC68HC711G5
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller
• Manufacturer: MOTOROLA [Motorola, Inc]

MC68HC11G5
Note:
EVI1C, EVI1B, EVI1A — Event Input Select 1 (EVI1)
Note:
11.6.3 Counters Enable/Interrupt Mask Register (EVMSK)
READ:
WRITE:
RESET:
EVCEN — Event Counters Enable
RESET:
$1072
EVI2C
EVI1C
0
1
1
1
1
0
0
0
0
1
1
1
EVCEN
The following table applies to mode 0 only:
In mode 0, EVI2 is used as a “clear” input to (EVCNT2).
In mode 2, these three bits should be reset to zero to allow PH4 to be used as an I/O port.
These three bits determine the operation of event input unit 1 as shown in the following
table.
The following table applies to modes 0, 1 and 2 only:
In mode 3, these three bits should be reset to zero to allow PH5 to be used as an I/O port.
Any time.
Any time.
$00.
0 – Event counters EVCNT1 and EVCNT2 are cleared. Also the event output (EVO)
1 – Event counters are enabled.
7
0
EVI1B
is cleared to a logic low level (when EVPOL = 0 and EVOEN = 1). The EVCLK and
EVCTL registers should be written while this bit is “0”.
0
0
1
1
0
0
1
6
0
EVI2B
X
0
0
1
1
EVI1A
0
1
0
1
0
1
X
5
0
EVI2A
4
0
X
0
1
0
1
EVI1
EVI1
EVI1
EVI1
EVI1
PH5
I/O
I/O
EVENT COUNTER
3
0
Clock Source
Scaled E
Scaled E
Scaled E
External
External
External
2
0
Clear input mode for EVCNT2
Not used
Falling edge of EVI2 (PH4)
Rising edge of EVI2 (PH4)
Logic HIGH (1) level on EVI2
Logic LOW (0) level on EVI2
EV2I
1
0
EV1I
0
0
Count Mode
Count stop
Count always
Inhibit counting on EVI1 = 0
Inhibit counting on EVI1 = 1
Count on falling edge of EVI1
Count on rising edge of EVI1
Count on both falling and
rising edges of EVI1
EVMSK
MOTOROLA
11-17