MC68HC711G5 MOTOROLA [Motorola, Inc], MC68HC711G5 Datasheet - Page 148

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MC68HC711G5

Manufacturer Part Number
MC68HC711G5
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
EV2I — Event 2 Interrupt Enable
EV1I — Event 1 Interrupt Enable
11.6.4 Interrupt Flag Register (EVFLG)
READ:
WRITE:
RESET:
EV2F — Event Interrupt 2 Flag
EV1F — Event interrupt 1 Flag
11.6.5 Counter Registers (EVCNTx)
READ:
WRITE:
RESET:
MOTOROLA
11-18
RESET:
$1073
RESET:
0 – Interrupt inhibited.
1 – Hardware interrupt requested when EV2F flag set.
0 – Interrupt inhibited.
1 – Hardware interrupt requested when EV1F flag set.
Any time.
Used as clearing mechanism (bits set cause corresponding bits to be cleared).
$00.
Set by a successful match of EVCNT2 and ECMP2B. This bit is cleared automatically by
a write to the EVFLG register with bit 1 set.
Set by a successful match of EVCNT1 and ECMP1A. This bit is cleared automatically by
a write to the EVFLG register with bit 0 set.
Any time.
Forces value to $00.
Indeterminate.
$1074
$1075
7
0
6
0
BIT7
BIT7
U
7
5
0
BIT6
BIT6
U
6
4
0
BIT5
BIT5
U
5
EVENT COUNTER
3
0
BIT4
BIT4
U
4
2
0
BIT3
BIT3
U
3
EV2F
1
0
BIT2
BIT2
U
2
EV1F
0
0
BIT1
BIT1
U
1
EVFLG
BIT0
BIT0
U
0
EVCNT1
EVCNT2
MC68HC11G5

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