MC68HC711G5 MOTOROLA [Motorola, Inc], MC68HC711G5 Datasheet - Page 152

• Manufacturer Part Number: MC68HC711G5
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller
• Manufacturer: MOTOROLA [Motorola, Inc]

12.1.1 Accumulators A and B
Accumulator A and accumulator B are general purpose 8-bit registers used to hold operands and
results of arithmetic calculations or data manipulations. These two accumulators can be concatenated
into a single 16-bit accumulator called accumulator D.
12.1.2 Index Register X (IX)
The 16-bit IX register is used for indexed mode addressing. It provides a 16-bit indexing value which
is added to an 8-bit offset provided in an instruction to create an effective address. The IX register
can also be used as a counter or as a temporary storage register.
12.1.3 Index Register Y (IY)
The 16-bit IY register is also used for indexed mode addressing, similar to the IX register;
however, all instructions using the IY register have a 2-byte opcode and require an extra cycle of
execution time.
12.1.4 Stack Pointer (SP)
The stack pointer (SP) is a 16-bit register which contains the address of the next free location on
the stack. The stack is configured as a sequence of last-in/first-out read/write registers which allow
important data to be stored during interrupts and subroutine calls. Each time a new byte is added
to the stack (a push), the SP is decremented; each time a byte is removed from the stack (a pull)
the SP is incremented.
12.1.5 Program Counter (PC)
The program counter is a 16-bit register which contains the address of the next instruction to
be executed.
12.1.6 Condition Code Register (CCR)
The condition code register is an 8-bit register in which the bits signify the results of the instruction
just executed. These bits can be individually tested by software and a specific action can be taken
as a result of the test. Each individual condition code register bit is explained below.
Carry/Borrow (C) — The C bit is set if there was a carry or borrow out of the arithmetic logic unit (ALU)
during the last arithmetic operation. The C bit is also affected during shift and rotate instructions.
Overflow (V) — The overflow bit is set if there was an arithmetic overflow as a result of the operation;
otherwise, the V bit is cleared.
Zero (Z) — The zero bit is set if the result of the last arithmetic, logic or data manipulation operation
was zero; otherwise, the Z bit is cleared.
MOTOROLA
CPU, ADDRESSING MODES AND INSTRUCTION SET
MC68HC11G5
12-2