MC68HC711G5 MOTOROLA [Motorola, Inc], MC68HC711G5 Datasheet - Page 159

• Manufacturer Part Number: MC68HC711G5
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller
• Manufacturer: MOTOROLA [Motorola, Inc]

MC68HC11G5
12.3.1.6
The shift and rotate functions in the M68HC11 CPU all involve the carry bit in the condition code
register in addition to the 8 or 16-bit operand in the instruction. This permits easy extension to
multiple word operands. Also, by setting or clearing the carry bit before a shift or rotate instruction,
the programmer can easily control what will be shifted into the opened end of an operand. The ASR
instruction maintains the original value of the most significant bit of the operand which facilitates
manipulation of twos complement (signed) numbers.
The logical left shift instructions are shown in parenthesis because there is no difference between
an arithmetic and a logical left shift. Both mnemonics are recognized by the assembler as equivalent,
but having both instruction mnemonics makes some programs easier to read.
Arithmetic Shift Left Memory
Arithmetic Shift Left A
Arithmetic Shift Left B
Arithmetic Shift Left Double
Arithmetic Shift Right Memory
Arithmetic Shift Right A
Arithmetic Shift Right B
(Logical Shift Left Memory)
(Logical Shift Left A
(Logical Shift Left B
(Logical Shift Left Double
Logical Shift Right Memory
Logical Shift Right A
Logical Shift Right B
Logical Shift Right D
Rotate Left Memory
Rotate Left A
Rotate Left B
Rotate Right Memory
Rotate Right A
Rotate Right B
Function
Shifts and Rotates
CPU, ADDRESSING MODES AND INSTRUCTION SET
Table 12-6. Shifts and Rotates
Mnemonic
(LSLA)
(LSLB)
(LSLD)
ASRA
ASRB
LSRD
ROLA
ROLB
RORA
RORB
ASLA
ASLB
ASLD
LSRA
LSRB
(LSL)
ASR
ROL
ROR
ASL
LSR
IMM
DIR
EXT
X
X
X
X
X
X
INDX
X
X
X
X
X
X
INDY
X
X
X
X
X
X
MOTOROLA
INH
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
12-9