MC68HC711G5 MOTOROLA [Motorola, Inc], MC68HC711G5 Datasheet - Page 164

• Manufacturer Part Number: MC68HC711G5
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller
• Manufacturer: MOTOROLA [Motorola, Inc]

12.3.4.2
The jump instruction allows control to be passed to any address in the 64 kbyte memory map.
12.3.4.3
These instructions provide an easy way to break a programming task into manageable blocks called
subroutines. The CPU automates the process of remembering the address in the main program
where processing should resume after the subroutine is finished. This address is automatically
pushed onto the stack when the subroutine is called and is pulled off the stack during the return from
subroutine (RTS) instruction which ends the subroutine.
12.3.4.4
This group of instructions is related to interrupt operations.
The software interrupt (SWI) instruction is similar to a jump to subroutine (JSR) instruction except
that the contents of all working CPU registers are saved on the stack, rather than just saving the
return address. SWI is unusual in that it is requested by the software program as opposed to other
interrupts which are requested asynchronously with respect to the executing program.
MOTOROLA
12-14
Jump
Branch to Subroutine
Jump to Subroutine
Return from Subroutine
Function
Jumps
Subroutine Calls and Returns (BSR, JSR, RTS)
Interrupt Handling (RTI, SWI, WAI)
Function
Table 12-11. Subroutine Calls and Returns (BSR, JSR, RTS)
Return from Interrupt
Software Interrupt
Wait for Interrupt
Table 12-12. Interrupt Handling (RTI, SWI, WAI)
CPU, ADDRESSING MODES AND INSTRUCTION SET
Function
Mnemonic
Table 12-10. Jumps
BSR
JSR
RTS
Mnemonic
JMP
REL
X
DIR
X
Mnemonic
DIR
X
SWI
WAI
RTI
EXT
X
EXT
X
INDX
X
INH
INDX
X
X
X
X
INDY
INDY
X
X
MC68HC11G5
INH
INH
X