MC68HC711G5 MOTOROLA [Motorola, Inc], MC68HC711G5 Datasheet - Page 47

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MC68HC711G5

Manufacturer Part Number
MC68HC711G5
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
MC68HC11G5
4.10.1 Data Register (PORTG)
READ:
WRITE:
RESET:
4.10.2 Data Direction Register (DDRG)
READ:
WRITE:
RESET:
Port H is an 8-bit general purpose I/O port. Three of the pins are used for the event counter (see
SECTION 11: EVENT COUNTER). Four of the remaining pins are used for the 4-channel PWM
timer (see SECTION 10: PULSE WIDTH MODULATION TIMER). The remaining pin is used for the
memory ready input signal (MRDY). Any pins not used for these functions may be used as general
purpose I/O.
When the PWENx bit in the PWEN register is set, the associated Port H bit is forced to be a PWM
output regardless of the state of the DDRH bit. This does not change the state of the DDRH bit. When
the PWENx bit in the PWEN register is cleared, the pin defaults to being a general purpose I/O. The
data direction of the pin is determined by the state of the corresponding DDRH bit.
Bits 4 and 5 of Port H are used as the EVI2 and EVI1 inputs or as general purpose I/O. The data
direction of Port H bits 4 and 5 is always under the control of DDRH bits 4 and 5, whether EVI2 and
EVI1 are enabled or not. If the pin is configured as an output by its DDRH bit, the output data of the
Port H register is also the input data of the event counter.
4.11
PORT H
RESET:
RESET:
$1002
Any time (inputs return pin levels; outputs return pin driver input levels).
Data stored in an internal latch (drives pins only if configured as outputs).
General purpose high impedance inputs ($00)
Any time.
Any time.
$00 (all general purpose I/O configured for input only).
0 – Bits set to zero configure the corresponding I/O pins as inputs.
1 – Bits set to one configure the corresponding I/O pins as outputs.
$1003
PG7
DDG7
7
0
7
0
DDG6
PG6
6
0
6
0
DDG5
PG5
5
0
5
0
INPUT/OUTPUT PORTS
DDG4
PG4
4
0
4
0
DDG3
PG3
3
0
3
0
PG2
DDG2
2
0
2
0
DDG1
PG1
1
0
1
0
DDG0
PG0
0
0
0
0
PORTG
DDRG
MOTOROLA
4-9

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