MC68HC711G5 MOTOROLA [Motorola, Inc], MC68HC711G5 Datasheet - Page 52

Manufacturer Part Number

MC68HC711G5

Description

High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller

Manufacturer

MOTOROLA [Motorola, Inc]

Datasheet

1.MC68HC711G5.pdf (195 pages)

IRV — Internal Read Visibility

MRDY — Memory Ready Enable

NHALT — Enable Halt Function

MOTOROLA

4-14

READ:

WRITE:

RESET:

0 – No visibility of internal reads on external bus.

1 – Data from internal reads is driven out on the external data bus.

READ:

WRITE:

0 – Memory Ready is disabled, Port H bit 7 is general purpose I/O.

1 – Memory Ready is enabled, Port H bit 7 is forced to be an input used as the MRDY

READ:

WRITE:

0 – Halt enabled (a logic low level detected on the HALT pin will cause the part to go

1 – Halt disabled.

line. External bus accesses will be stretched as long as this line is held low.

into the HALT state at the completion of the present instruction).

Any time.

If SMOD=1, any time. If SMOD=0, only one write is allowed.

Test and bootstrap modes – 1; single chip and expanded modes – 0.

Any time.

Any time

INPUT/OUTPUT PORTS

MC68HC11G5