MC68HC711G5 MOTOROLA [Motorola, Inc], MC68HC711G5 Datasheet - Page 62

• Manufacturer Part Number: MC68HC711G5
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller
• Manufacturer: MOTOROLA [Motorola, Inc]

All interrupt sources from on-chip peripherals have software programmable interrupt mask bits
which may be used to selectively inhibit automatic hardware response to each interrupt source. In
addition the X and I bits in the condition code register act as class inhibit masks to inhibit all sources
in the X bit and/or I bit class. Figures 5-2, 5-3 and 5-4 summarize the priority structure and additional
mask conditions that lead to the recognition of interrupt requests in the MC68HC11G5.
MOTOROLA
5-10
DELAY 4064 E CYCLES
POWER-ON RESET
$FFFE, FFFF (VECTOR FETCH)
(POR)
LOAD PROGRAM COUNTER
WITH CONTENTS OF
1A
Figure 5-2. Processing Flow out of Resets
RESETS, INTERRUPTS AND LOW POWER MODES
HIGHEST
EXTERNAL RESET
YES
BEGIN AN INSTRUCTION
SET S, X, AND I BITS
RESET MCU
HARDWARE
SEQUENCE
$FFFC, FFFD (VECTOR FETCH)
XIRQ PIN
LOAD PROGRAM COUNTER
IN CCR
IN CCR
LOW ?
SET ?
X BIT
1B
CLOCK MONITOR FAIL
WITH CONTENTS OF
NO
NO
(WITH CME = 1)
PRIORITY
YES
SET X AND I BITS
FETCH VECTOR
STACK CPU
REGISTERS
$FFF4, FFF5
$FFFA, FFFB (VECTOR FETCH)
LOAD PROGRAM COUNTER
WITH CONTENTS OF
(WITH NOCOP = 0)
COP WATCHDOG
TIMEOUT
LOWEST
MC68HC11G5