MC68HC711G5 MOTOROLA [Motorola, Inc], MC68HC711G5 Datasheet - Page 85

• Manufacturer Part Number: MC68HC711G5
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller
• Manufacturer: MOTOROLA [Motorola, Inc]

MC68HC11G5
6.4.15 Main Timer Interrupt Mask Register 1 (TMSK1)
The bits in TMSK1 correspond bit-for-bit with the bits in the TFLG1 status register. A zero disables
the corresponding flag from causing a hardware interrupt. A one enables the corresponding flag to
cause a hardware interrupt.
READ:
WRITE:
RESET
OC1I, OC2I, OC3I, OC4I — Output Compare “x” Interrupt Enable
4/5I — Input Capture 4/Output Compare 5 Interrupt Enable
IC1I, IC2I, IC3I — Input Capture “x” Interrupt Enable
6.4.16 Main Timer Interrupt Flag Register 1 (TFLG1)
The main timer system flag register (TFLG1) contains flag bits which are set by hardware when the
corresponding timer interrupt condition occurs. Any flag bits in the TFLG1 register which are set will
remain set until they are cleared by writing ones to those bits.
READ:
WRITE:
RESET:
RESET:
RESET:
Any time
Any time
$00
0 – Interrupt inhibited.
1 – OCx interrupt requested when OCxF flag set
0 – Interrupt inhibited.
1 – IC4 or OC5 interrupt requested when 4/5F flag set
0 – Interrupt inhibited.
1 – ICx interrupt requested when ICxF flag set
Any time.
Used in clearing mechanism (writing ones to bits set cause these bits to be
cleared).
$00
$1022
$1023
OC1F
OC1I
7
0
7
0
OC2F
OC2I
6
0
6
0
OC3F
OC3I
PROGRAMMABLE TIMER
5
0
5
0
OC4F
OC4I
4
0
4
0
4/5F
4/5I
3
0
3
0
IC1F
IC1I
2
0
2
0
IC2F
IC2I
1
0
1
0
IC3F
IC3I
0
0
0
0
TMSK1
TFLG1
MOTOROLA
6-15