MC68HC908JK3 MOTOROLA [Motorola, Inc], MC68HC908JK3 Datasheet - Page 104

• Manufacturer Part Number: MC68HC908JK3
• Description: MC68HC908JK1
• Manufacturer: MOTOROLA [Motorola, Inc]

Monitor ROM (MON)
9.4.1 Entering Monitor Mode
Technical Data
104
V
V
Notes:
1. PTB3 = 0: Bypasses the divide-by-two prescaler to SIM when using V
2. XTALCLK is the X-tal oscillator output, for MC68HC908xxx. See
4. RCCLK is the RC oscillator output, for MC68HRC908xxx. See
5. See
DD
DD
V
V
The OSC1 clock must be 50% duty cycle for this condition.
DD
DD
+ V
+ V
Table 18-4
HI
HI
(contain
BLANK
BLANK
$FF)
NOT
X
X
for V
Table 9-1. Monitor Mode Entry Requirements and Options
DD
+ V
X
X
0
1
HI
Table 9-1
specified in the table, monitor mode may be entered after a POR and will
allow communication at 9600 baud provided one of the following sets of
conditions is met:
voltage level requirements.
1. If IRQ1 = V
2. If IRQ1 = V
3. If $FFFE & $FFFF is blank (contains $FF):
X
X
0
0
– External clock on OSC1 is 4.9125MHz
– PTB3 = low
– External clock on OSC1 is 9.8304MHz
– PTB3 = high
– The oscillator clock is 9.8304MHz (X-tal or RC)
– IRQ1 = V
X
X
1
1
shows the pin conditions for entering monitor mode. As
X
1
1
1
desired frequency
Monitor ROM (MON)
Clock Source
DD
DD
4.9152MHz
9.8304MHz
9.8304MHz
Frequency
oscillator at
oscillator at
X-tal or RC
X-tal or RC
DD
OSC1 at
OSC1 at
+ V
+ V
and
HI
HI
:
:
Figure
Figure
DD
8-2.
XTALCLK ÷ 4
2.4576MHz
2.4576MHz
2.4576MHz
Frequency
RCCLK ÷ 4
8-1.
+ V
Bus
HI
or
for monitor mode entry.
MC68H(R)C908JL3
Bypasses X-tal or RC
oscillator; external clock
driven directly into OSC1.
9600 baud communication
on PTB0. COP disabled.
Low-voltage entry to
monitor mode.
9600 baud communication
on PTB0. COP disabled.
Enters User mode.
If $FFFE and $FFFF is
blank, MCU will encounter
an illegal address reset.
Comments
MOTOROLA
—
Rev. 1.0