MC68HC908JK3 MOTOROLA [Motorola, Inc], MC68HC908JK3 Datasheet - Page 143

• Manufacturer Part Number: MC68HC908JK3
• Description: MC68HC908JK1
• Manufacturer: MOTOROLA [Motorola, Inc]

MC68H(R)C908JL3
MOTOROLA
NOTE:
—
Rev. 1.0
AIEN — ADC Interrupt Enable Bit
ADCO — ADC Continuous Conversion Bit
ADCH[4:0] — ADC Channel Select Bits
Recovery from the disabled state requires one conversion cycle to
stabilize.
When this bit is set, an interrupt is generated at the end of an ADC
conversion. The interrupt signal is cleared when the data register is
read or the status/control register is written. Reset clears the AIEN bit.
When set, the ADC will convert samples continuously and update the
ADR register at the end of each conversion. Only one conversion is
allowed when this bit is cleared. Reset clears the ADCO bit.
ADCH4, ADCH3, ADCH2, ADCH1, and ADCH0 form a 5-bit field
which is used to select one of the ADC channels. The five channel
select bits are detailed in the following table. Care should be taken
when using a port pin as both an analog and a digital input
simultaneously to prevent switching noise from corrupting the analog
signal. (See
The ADC subsystem is turned off when the channel select bits are all
set to one. This feature allows for reduced power consumption for the
MCU when the ADC is not used. Reset sets all of these bits to a
logic 1.
1 = ADC interrupt enabled
0 = ADC interrupt disabled
1 = Continuous ADC conversion
0 = One ADC conversion
Analog-to-Digital Converter (ADC)
Table 11-1.)
Analog-to-Digital Converter (ADC)
Technical Data
I/O Registers
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