MC68HC908JK3 MOTOROLA [Motorola, Inc], MC68HC908JK3 Datasheet - Page 145

• Manufacturer Part Number: MC68HC908JK3
• Description: MC68HC908JK1
• Manufacturer: MOTOROLA [Motorola, Inc]

11.8.3 ADC Input Clock Register
MC68H(R)C908JL3
MOTOROLA
—
Rev. 1.0
Address:
Address:
This register selects the clock frequency for the ADC.
ADIV2:ADIV0 — ADC Clock Prescaler Bits
Reset:
Reset:
Read:
Read:
Write:
Write:
ADIV2, ADIV1, and ADIV0 form a 3-bit field which selects the divide
ratio used by the ADC to generate the internal ADC clock.
shows the available clock configurations. The ADC clock should be
set to approximately 1MHz.
$003D
$003E
ADIV2
Bit 7
AD7
Bit 7
Figure 11-5. ADC Input Clock Register (ADICLK)
Analog-to-Digital Converter (ADC)
0
Figure 11-4. ADC Data Register (ADR)
= Unimplemented
= Unimplemented
ADIV1
AD6
6
6
0
ADIV0
AD5
5
5
0
Indeterminate after reset
AD4
4
4
0
0
AD3
3
3
0
0
Analog-to-Digital Converter (ADC)
AD2
2
2
0
0
AD1
1
1
0
0
Technical Data
Table 11-2
I/O Registers
Bit 0
Bit 0
AD0
0
0
145