MC68HC908JK3 MOTOROLA [Motorola, Inc], MC68HC908JK3 Datasheet - Page 150

• Manufacturer Part Number: MC68HC908JK3
• Description: MC68HC908JK1
• Manufacturer: MOTOROLA [Motorola, Inc]

I/O Ports
12.4.1 Data Direction Register A (DDRA)
Technical Data
150
NOTE:
Address:
Data direction register A determines whether each port A pin is an input
or an output. Writing a logic one to a DDRA bit enables the output buffer
for the corresponding port A pin; a logic zero disables the output buffer.
DDRA[6:0] — Data Direction Register A Bits
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
Figure 12-4
Reset:
Read:
Write:
These read/write bits control port A data direction. Reset clears
DDRA[6:0], configuring all port A pins as inputs.
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
$0004
Bit 7
0
0
Figure 12-3. Data Direction Register A (DDRA)
shows the port A I/O logic.
DDRA6
6
0
I/O Ports
DDRA5
5
0
DDRA4
4
0
DDRA3
3
0
MC68H(R)C908JL3
DDRA2
2
0
DDRA1
1
0
MOTOROLA
—
Rev. 1.0
DDRA0
Bit 0
0