ISL6412_07 INTERSIL [Intersil Corporation], ISL6412_07 Datasheet

ISL6412_07

Manufacturer Part Number

ISL6412_07

Description

Triple Output, Low-Noise LDO Regulator with Integrated Reset Circuit

Manufacturer

INTERSIL [Intersil Corporation]

Datasheet

1.ISL6412_07.pdf (10 pages)

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Triple Output, Low-Noise LDO Regulator

with Integrated Reset Circuit

The ISL6412 is an ultra low noise triple output LDO regulator

with microprocessor reset circuit and is optimized for

powering wireless chip sets. The IC accepts an input voltage

range of 3.0V to 3.6V and provides three regulated output

voltages: 1.8V (LDO1), 2.8V (LDO2), and another ultra-clean

2.8V (LDO3). On chip logic provides sequencing between

LDO1 and LDO2 for the BBP/MAC and the I/O supply

voltage outputs. LDO3 features ultra low noise that does not

typically exceed 30µV RMS to aid VCO stability. High

integration and the thin Quad Flat No-lead (QFN) package

makes the ISL6412 an ideal choice to power many of today’s

small form factor industry standard wireless cards such as

PCMCIA, mini-PCI and Cardbus-32.

The ISL6412 uses an internal PMOS transistor as the pass

device. The ISL6412 also integrates a reset function, which

eliminates the need for the additional reset IC required in

WLAN applications. The IC asserts a RESET signal

whenever the VIN supply voltage drops below a preset

threshold, keeping it asserted for a time set by a capacitor to

GND after VIN has risen above the reset threshold. FAULT1

indicates the loss of regulation on LDO1.

Ordering Information

NOTES:

ISL6412IR

ISL6412IR-TK

ISL6412IR-T5K ISL6412IR

ISL6412IRZ

(Note 2)

ISL6412IRZ-TK

(Notes 1, 2)

1. Tape and Reel available. Add “-T” suffix for Tape and Reel Packing

2. Intersil Pb-free plus anneal products employ special Pb-free

NUMBER

Option

material sets; molding compounds/die attach materials and 100%

matte tin plate termination finish, which are RoHS compliant and

compatible with both SnPb and Pb-free soldering operations.

Intersil Pb-free products are MSL classified at Pb-free peak reflow

temperatures that meet or exceed the Pb-free requirements of

IPC/JEDEC J STD-020.

PART

ISL6412IR

6412IRZ

MARKING

PART

-40 to +85 16 Ld 4x4 QFN L16.4x4

-40 to +85 16 Ld 4x4 QFN

RANGE

TEMP.

(°C)

Data Sheet

(Pb-free)

PACKAGE

L16.4x4

1-888-INTERSIL or 1-888-468-3774

DWG. #

PKG.

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Features

• Small DC/DC Converter Size

• High Output Current

• Ultra-Low Dropout Voltage

• Ultra-Low Output Voltage Noise

• Stable with Small Ceramic Output Capacitors

• Extensive Protection and Monitoring Features

• Logic-Controlled Shutdown Pin

• Integrated Microprocessor Reset Circuit

• Proven Reference Design for a Total WLAN System

• QFN Package

• Pb-Free Plus Anneal Available (RoHS Compliant)

Applications

• PRISM® 3 Chipsets – ISL37106P

• WLAN Cards

• Liberty Chipset

• Hand-Held Instruments

- Three LDOs and Reset Circuitry in a Low-Profile

- LDO1, 1.8V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 330mA

- LDO2, 2.8V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225mA

- LDO3, 2.8V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125mA

- LDO2, 2.8V. . . . . . . . . . . . . . . . 125mV (typ.) at 225mA

- LDO3, 2.8V. . . . . . . . . . . . . . . . 100mV (typ.) at 125mA

- <30μV

- Over current protection

- Short circuit protection

- Thermal shutdown

- FAULT indicator

- Programmable Reset Delay

Solution

- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat

- Near Chip-Scale Package Footprint Improves PCB

- PCMCIA, Cardbus32, MiniPCI Cards

- Compact Flash Cards

4x4mm QFN Package

No Leads - Product Outline

Efficiency and Is Thinner in Profile

March 20, 2007

All other trademarks mentioned are the property of their respective owners.

RMS

Intersil (and design) is a registered trademark of Intersil Americas Inc.

(typ.) for LDO3 (VCO Supply)

ISL6412

FN9067.1

Related parts for ISL6412_07

ISL6412_07 Summary of contents

Page 1

Data Sheet Triple Output, Low-Noise LDO Regulator with Integrated Reset Circuit The ISL6412 is an ultra low noise triple output LDO regulator with microprocessor reset circuit and is optimized for powering wireless chip sets. The IC accepts an input ...

Page 2

Pinout Typical Application Schematic +3. 3.3μF C8 0.01μF +2.8V V OUT3 C3 3.3μF Typical Bill Of Materials REFERENCE DESIGNATOR VALUE C1, C2, C3, C4 3.3µF, X7R C5, C6, C7 0.033µF, X7R C8 0.01µF, X7R U1 ISL6412IR ...

Page 3

Functional Block Diagram 15 FAULT1 THERMAL SHUTDOWN CONTROL LOGIC 3 SHDN 2 CT RESET 1 RESET 8 GND 3 ISL6412 BAND GAP REF. 1.2V LDO1 VREF WINDOW COMP EN EN 150°C LDO2 VREF LDO3 VREF EN EN ...

Page 4

Absolute Maximum Ratings V , SHDN to GND/GND3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0V IN SET, ...

Page 5

Electrical Specifications V = +3.3V, Compensation Capacitor = 33nF PARAMETER Output Voltage Noise (Note 7) LDO3 SPECIFICATIONS Output Voltage (V ) OUT3 Output Voltage Accuracy Maximum Output Current (I ) (Note 7) OUT3 Output Current Limit (Note 7) ...

Page 6

Typical Performance Curves SHDN 2V/DIV VOUT1 2V/DIV RESET 2V/DIV FAULT 2V/DIV 20ms/DIV FIGURE 3. SHUTDOWN, FAULT, and RESET OPERATION VOUT2 100mV/DIV IOUT2 100mA/DIV 1ms/DIV FIGURE 5. LDO2 TRANSIENT RESPONSE (10mA to 200mA) VIN 0.5V/DIV RESET 0.5V/DIV 20ms/DIV FIGURE 7. RESET ...

Page 7

Typical Performance Curves FAULT 1V/DIV VOUT1/2/3 500ms/DIV 1V/DIV FIGURE 9. THERMAL SHUTDOWN OPERATION FIGURE 11. VOUT1 REGULATION DOWN TO VIN = 2.7V; FAULT MONITORS VOUT1 ONLY Pin Descriptions OUT1 - This pin is the output for LDO1. Bypass with a ...

Page 8

LOW during thermal shutdown or an overcurrent event on LDO1. Connect this pin to GND, if unused. RESET - This pin is the active-LOW output of the push-pull output stage of the integrated reset supervisory circuit. The ...

Page 9

Thermal Overload Protection Thermal overload protection limits total power dissipation in the ISL6412. When the junction temperature (T +150°C, the thermal sensor sends a signal to the shutdown logic, turning off the pass transistor and allowing the IC to cool. ...

Page 10

Quad Flat No-Lead Plastic Package (QFN) Micro Lead Frame Plastic Package (MLFP) All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description ...

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