ISL6530/31EVAL1

Manufacturer Part NumberISL6530/31EVAL1
DescriptionDual 5V Synchronous Buck Pulse-Width Modulator (PWM) Controller for DDRAM Memory VDDQ and VTT Termination
ManufacturerINTERSIL [Intersil Corporation]
ISL6530/31EVAL1 datasheet
 


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Data Sheet
Dual 5V Synchronous Buck Pulse-Width
Modulator (PWM) Controller for DDRAM
Memory V
and V
Termination
DDQ
TT
The ISL6531 provides complete control and protection for
dual DC-DC converters optimized for high-performance
DDRAM memory applications. It is designed to drive low
cost N-channel MOSFETs in synchronous-rectified buck
topology to efficiently generate 2.5V V
DDQ
DDRAM memory, V
for DDRAM differential signalling,
REF
and V
for signal termination. The ISL6531 integrates all of
TT
the control, output adjustment, monitoring and protection
functions into a single package.
The V
output of the converter is maintained at 2.5V
DDQ
through an integrated precision voltage reference. The V
output is precisely regulated to 1/2 the memory power
supply, with a maximum tolerance of ±1% over temperature
and line voltage variations. V
accurately tracks V
TT
During V2_SD sleep mode, the V
output is maintained by
TT
a low power window regulator.
The ISL6531 provides simple, single feedback loop, voltage-
mode control with fast transient response for the V
regulator. The V
regulator features internal compensation
TT
that eases the design. It includes two phase-locked 300kHz
triangle-wave oscillators which are displaced 90
interference between the two PWM regulators. The
regulators feature error amplifiers with a 15MHz gain-
bandwidth product and 6V/µs slew rate which enables high
converter bandwidth for fast transient performance. The
resulting PWM duty ratio ranges from 0% to 100%.
The ISL6531 protects against overcurrent conditions by
inhibiting PWM operation. The ISL6531 monitors the current
in the V
regulator by using the r
DDQ
DS(ON)
MOSFET which eliminates the need for a current sensing
resistor.
Ordering Information
TEMP
o
PART NUMBER
RANGE(
C)
PACKAGE
ISL6531CB
0 to 70
24 Lead SOIC
ISL6531CBZ
0 to 70
24 Lead SOIC
(See Note)
(Pb-free)
ISL6531CR
0 to 70
32 Lead 5x5 QFN L32.5x5
ISL6530/31EVAL1 Evaluation Board
Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb
and Pb-free soldering operations. Intersil Pb-free products are MSL classified
at Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
1
August 11, 2005
Features
• Provides V
channel DDRAM memory systems
• Excellent voltage regulation
= 2.5V ±2% over full operating range
- V
DDQ
- V
=
REF
- V
= V
TT
for powering
• Supports ‘S3’ sleep mode
- V
is held at
TT
regulator to minimize wake-up time
• Fast transient response
- Full 0% to 100% duty ratio
REF
• Operates from +5V Input
• V
regulator internally compensated
TT
.
• Overcurrent fault monitor on VDD
REF
- Does not require extra current sensing element
- Uses MOSFET’s r
• Drives inexpensive N-Channel MOSFETs
DDQ
• Small converter size
- 300kHz fixed frequency oscillator
o
to minimize
• 24 Lead, SOIC or 32 Lead, 5mm×5mm QFN
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• V
, V
DDQ
TT
systems
- Main memory in AMD® Athlon™ and K8™, Pentium®
III, Pentium IV, Transmeta, PowerPC™, AlphaPC™, and
of the upper
UltraSparc® based computer systems
• High-power tracking DC-DC regulators
PKG. DWG. #
M24.3
M24.3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
|
1-888-INTERSIL or 1-888-468-3774
Intersil (and design) is a registered trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
ISL6531
FN9053.2
, V
, and V
voltages for one- and two-
DDQ
REF
TT
1
±1% over full operating range
-- - V
DDQ
2
± 30mV
REF
1
via a low power window
-- - V
DDQ
2
DS(ON)
, and VREF regulation for DDRAM memory
Copyright © Intersil Americas Inc. 2003, 2005. All Rights Reserved.

ISL6530/31EVAL1 Summary of contents

  • Page 1

    ... ISL6531CR Lead 5x5 QFN L32.5x5 ISL6530/31EVAL1 Evaluation Board Add “-T” suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...

  • Page 2

    Pinouts 24 LEAD (SOIC) TOP VIEW 24 UGATE1 1 23 BOOT1 2 22 PHASE1 3 21 VREF 4 20 FB1 COMP1 18 7 SENSE1 17 VREF_IN GNDA 15 PHASE2 BOOT2 13 ...

  • Page 3

    Block Diagram PGOOD FB1 COMP1 SENSE1 VREF_IN + VREF - SENSE2 V2_SD 3 ISL6531 OCSET/SD VCC POWER-ON RESET (POR) + SOFT- - 40µA START OVER- CURRENT PWM ERROR COMPARATOR AMP INHIBIT + + - - PWM 0.8V REFERENCE OSCILLATOR o ...

  • Page 4

    Typical Application +5V R OCSET OCSET/SD RESET GNDA V2_SD SLEEP VREF_IN V REF (.5xV ) DDQ VREF COMP1 FB1 R FB1 4 ISL6531 PGOOD VCC PGOOD BOOT1 UGATE1 PHASE1 PVCC1 LGATE1 ISL6531 PGND1 D BOOT2 UGATE2 C PHASE2 LGATE2 PGND2 ...

  • Page 5

    Absolute Maximum Ratings Supply Voltage +7.0V CC ...

  • Page 6

    Functional Pin Description 24 LEAD (SOIC) TOP VIEW 24 UGATE1 1 23 BOOT1 2 22 PHASE1 3 21 VREF 4 20 FB1 COMP1 18 7 SENSE1 17 VREF_IN GNDA 15 PHASE2 ...

  • Page 7

    While the V supply “floats” held to about 50 via a low current window regulator which drives V DDQ via the SENSE2 pin. The window regulator can overcome least ±10mA of leakage ...

  • Page 8

    TIME FIGURE 2. SOFT-START INTERVAL Shoot-Through Protection A shoot-through condition occurs when both the upper MOSFET and lower MOSFET are turned on simultaneously, effectively shorting the input voltage to ground. To protect the regulators from ...

  • Page 9

    One method that may be employed to bypass the internal V reference generation is to supply an external reference TT directly to the VREF_IN pin. When doing this the SENSE1 pin must remain unconnected. Caution must be exercised when using ...

  • Page 10

    R the equation above with: 1. The maximum r at the highest junction DS(ON) temperature. 2. The minimum I from the specification table. OCSET > Determine I for PEAK PEAK OUT ...

  • Page 11

    Use copper filled polygons on the top and bottom circuit layers for the phase nodes. Use the remaining printed circuit layers for small signal wiring. The wiring traces from the GATE pins to the MOSFET gates should be kept ...

  • Page 12

    The compensation network consists of the error amplifier (internal to the ISL6531) and the impedance networks Z and Z . The goal of the compensation network is to provide FB a closed loop transfer function with the highest 0dB crossing ...

  • Page 13

    Consult with the manufacturer of the load on specific decoupling requirements. Use only specialized low-ESR capacitors intended for switching-regulator applications for the bulk capacitors. The bulk capacitor’s ESR will determine the ...

  • Page 14

    These equations assume linear voltage-current transitions and do not adequately model power loss due the reverse-recovery of the upper and lower MOSFET’s body diode. The gate-charge losses are dissipated by the ISL6531 and don't heat ...

  • Page 15

    ISL6531 DC-DC Converter Application Circuit Figure 11 shows an application circuit for a DDR SDRAM power supply, including V (+2.5V) and V DDQ Detailed information on the circuit, including a complete Billof-Materials and circuit board description, can be found V2_SD ...

  • Page 16

    Small Outline Plastic Packages (SOIC) N INDEX 0.25(0.010) H AREA E - SEATING PLANE - -C- α µ 0.10(0.004) 0.25(0.010 NOTES: 1. Symbols are defined in ...

  • Page 17

    Quad Flat No-Lead Plastic Package (QFN) Micro Lead Frame Plastic Package (MLFP) All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description ...