ISL6530/31EVAL1 INTERSIL [Intersil Corporation], ISL6530/31EVAL1 Datasheet - Page 13

• Manufacturer Part Number: ISL6530/31EVAL1
• Description: Dual 5V Synchronous Buck Pulse-Width Modulator (PWM) Controller for DDRAM Memory VDDQ and VTT Termination
• Manufacturer: INTERSIL [Intersil Corporation]

could cancel the usefulness of these low inductance
components. Consult with the manufacturer of the load on
specific decoupling requirements.
Use only specialized low-ESR capacitors intended for
switching-regulator applications for the bulk capacitors. The
bulk capacitor’s ESR will determine the output ripple voltage
and the initial voltage drop after a high slew-rate transient. An
aluminum electrolytic capacitor’s ESR value is related to the
case size with lower ESR available in larger case sizes.
However, the equivalent series inductance (ESL) of these
capacitors increases with case size and can reduce the
usefulness of the capacitor to high slew-rate transient loading.
Unfortunately, ESL is not a specified parameter. Work with
your capacitor supplier and measure the capacitor’s
impedance with frequency to select a suitable component. In
most cases, multiple electrolytic capacitors of small case size
perform better than a single large case capacitor.
Output Inductor Selection
The output inductor is selected to meet the output voltage
ripple requirements and minimize the converter’s response
time to the load transient. Additionally, the output inductor for
the V
loop stability as described in the V
Compensation section. The inductor value determines the
converter’s ripple current and the ripple voltage is a function
of the ripple current. The ripple voltage and current are
approximated by the following equations:
Increasing the value of inductance reduces the ripple current
and voltage. However, the large inductance values reduce
the converter’s response time to a load transient.
One of the parameters limiting the converter’s response to
a load transient is the time required to change the inductor
current. Given a sufficiently fast control loop design, the
ISL6531 will provide either 0% or 100% duty cycle in
response to a load transient. The response time is the time
required to slew the inductor current from an initial current
value to the transient current level. During this interval the
difference between the inductor current and the transient
current level must be supplied by the output capacitor.
Minimizing the response time can minimize the output
The response time to a transient is different for the
application of load and the removal of load. The following
equations give the approximate response time interval for
application and removal of a transient load:
where: I
response time to the application of load, and t
capacitance required.
∆I =
t
RISE
TT
=
V
TRAN
IN
regulator has to meet the minimum value criteria for
f
s
V
- V
L x I
x L
IN
OUT
- V
is the transient load current step, t
TRAN
OUT
x
V
V
OUT
IN
13
t
FALL
∆V
OUT
TT
=
Feedback
= ∆I x ESR
L x I
V
OUT
TRAN
FALL
RISE
is the
is the
ISL6531
I
response time to the removal of load. The worst case
response time can be either at the application or removal of
load. Be sure to check both of these equations at the
minimum and maximum output levels for the worst case
response time.
Input Capacitor Selection
Use a mix of input bypass capacitors to control the voltage
overshoot across the MOSFETs. Use small ceramic
capacitors for high frequency decoupling and bulk capacitors
to supply the current needed each time Q
small ceramic capacitors physically close to the MOSFETs
and between the drain of Q
The important parameters for the bulk input capacitor are the
voltage rating and the RMS current rating. For reliable
operation, select the bulk capacitor with voltage and current
ratings above the maximum input voltage and largest RMS
current required by the circuit. The capacitor voltage rating
should be at least 1.25 times greater than the maximum
input voltage and a voltage rating of 1.5 times is a
conservative guideline. The RMS current rating requirement
for the input capacitor of a buck regulator is approximately
1/2 the DC load current.
The maximum RMS current required by the regulator may be
closely approximated through the following equation:
For a through hole design, several electrolytic capacitors may
be needed. For surface mount designs, solid tantalum
capacitors can be used, but caution must be exercised with
regard to the capacitor surge currentrating. These capacitors
must be capable of handling the surge-current at power-up.
Some capacitor series available from reputable manufacturers
are surge current tested.
MOSFET Selection/Considerations
The ISL6531 requires two N-Channel power MOSFETs for
each PWM regulator. These should be selected based upon
r
requirements.
In high-current applications, the MOSFET power dissipation,
package selection and heatsink are the dominant design
factors. The power dissipation includes two loss components;
conduction loss and switching loss. The conduction losses are
the largest component of power dissipation for both the upper
and the lower MOSFETs. These losses are distributed between
the two MOSFETs according to duty factor. The switching
losses seen when sourcing current will be different from the
switching losses seen when sinking current. The V
regulator will only source current while the V
sink and source. When sourcing current, the upper MOSFET
realizes most of the switching losses. The lower switch realizes
most of the switching losses when the converter is sinking
RMS
DS(ON)
MAX
, gate supply requirements, and thermal management
=
V
--------------- -
V
OUT
IN
×



I
OUT
MAX
1
and the source of Q
2
+
----- -
12
1
×



V
------------------------------- -
1
IN
turns on. Place the
L
TT
–
×
V
regulator can
f
OUT
s
2
DDQ
.
×
V
--------------- -
V
OUT
IN



2


