ADM1027ARQZ-RL71 ONSEMI [ON Semiconductor], ADM1027ARQZ-RL71 Datasheet

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FEATURES Monitors Supply Voltages Controls and Monitors Fan Speeds 1 On-Chip and 2 Remote Temperature Sensors Monitors Processor VID Bits Automatic Fan Speed Control Mode Controls System Cooling Based on Measured ...

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ADM1027–SPECIFICATIONS Parameter POWER SUPPLY Supply Voltage Supply Current TEMP-TO-DIGITAL CONVERTER Local Sensor Accuracy Resolution Remote Diode Sensor Accuracy Resolution Remote Sensor Source Current ANALOG-TO-DIGITAL CONVERTER (INCLUDING MUX AND ATTENUATORS) Total Unadjusted Error, TUE Differential Nonlinearity, DNL Power Supply ...

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Parameter OPEN-DRAIN SERIAL DATA BUS OUTPUT (SDA) Output Low Voltage High Level Output Current SMBUS DIGITAL INPUTS (SCL, SDA) Input High Voltage Input Low Voltage Hysteresis DIGITAL INPUT LOGIC LEVELS (VID0–4) Input ...

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ADM1027 ABSOLUTE MAXIMUM RATINGS* Positive Supply Voltage ( 6 Voltage Pin . . ...

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Pin Mnemonic 1 SDA 2 SCL 3 GND VID0 6 VID1 7 VID2 8 VID3 9 TACH3 10 PWM2/SMBALERT 11 TACH1 12 TACH2 PWM3/ADDRESS ENABLE 13 14 TACH4/ADDRESS SELECT 15 D2– 16 D2+ 17 D1– 18 ...

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ADM1027 FUNCTIONAL DESCRIPTION General Description The ADM1027 is a complete systems monitor and multiple fan controller for any system requiring monitoring and cooling. The device communicates with the system via a serial system management bus. The serial bus controller has ...

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DXP TO GND 0 –5 DXP TO V (3.3V) CC –10 –15 –20 1.0 3.3 10.0 30.0 100.0 LEAKAGE RESISTANCE (M ) TPC 1. Remote Temperature Error vs. Leakage Resistance 14.0 12.0 10.0 8.0 250mV 6.0 4.0 ...

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ADM1027 SERIAL BUS INTERFACE Control of the ADM1027 is carried out using the serial System Management Bus (SMBus). The ADM1027 is connected to this bus as a slave device, under the control of a master controller. The ADM1027 has a ...

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Any number of bytes of data can be transferred over the serial bus in one operation. However not possible to mix read and write in one operation because the type of operation is determined at the beginning and ...

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ADM1027 Notes possible to read a data byte from a data register without first writing to the address pointer register if the address pointer register is already at the correct value. However not possible to ...

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Once the ADM1027 has responded to the alert response address, the master must read the status registers and the SMBALERT will only be cleared if the error condition has gone away. SMBus Timeout The ADM1027 includes an SMBus timeout ...

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ADM1027 <0.0156 <0.0065 0.0156 – 0.0312 0.0065 – 0.0130 0.0312 – 0.0469 0.0130 – 0.0195 0.0469 – 0.0625 0.0195 – 0.0260 0.0625 – 0.0781 0.0260 – 0.0325 0.0781 – 0.0937 0.0325 – 0.0390 0.0937 ...

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VID CODE MONITORING The ADM1027 has five dedicated voltage ID (VID code) inputs. These are digital inputs that can be read back through the VID register (Reg. 0x43) to determine the processor voltage required/being used in the system. Five VID ...

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ADM1027 TEMPERATURE MEASUREMENT SYSTEM Local Temperature Measurement The ADM1027 contains an on-chip band gap temperature sensor whose output is digitized by the on-chip 10-bit ADC. The 8-bit MSB temperature data is stored in the local temp register (Address 0x26). As ...

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If a discrete transistor is used, the collector will not be grounded, and should be linked to the base PNP transistor is used, the base is connected to the D– input and the emitter to the D+ input. ...

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ADM1027 TEMPERATURE MEASUREMENT REGISTERS Reg. 0x25 Remote 1 Temperature = 0x80 default Reg. 0x26 Local Temperature = 0x80 default Reg. 0x27 Remote 2 Temperature = 0x80 default Reg. 0x77 Extended Resolution 2 = 0x00 default <7:6> TDM2 = Remote 2 ...

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SMBALERT, STATUS, AND MASK REGISTERS SMBALERT CONFIGURATION Pin 10 of the ADM1027 can be configured as either PWM2 SMBALERT output. The SMBALERT output may be used to signal out-of-limit conditions as explained below. The default state of ...

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ADM1027 ANALOG MONITORING CYCLE TIME The analog monitoring cycle begins when written to the start bit (Bit 0) of Configuration Register 1(Reg. 0x40). The ADC measures each analog input in turn and as each mea- surement is ...

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SMBALERT INTERRUPT BEHAVIOR The ADM1027 can be polled for status SMBALERT interrupt can be generated for out-of-limit conditions important to note how the SMBALERT output and status bits behave when writing interrupt handler software. HIGH LIMIT ...

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ADM1027 FAN DRIVE CIRCUITRY Fan Drive Using PWM Control The ADM1027 uses Pulsewidth Modulation (PWM) to control fan speed. This relies on varying the duty cycle (or on/off ratio square wave applied to the fan to vary the ...

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Driving 2 Fans From PWM3 Note that the ADM1027 has four TACH inputs available for fan speed measurement, but only three PWM drive outputs fourth fan is being used in the system, it should be driven from the ...

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ADM1027 Driving 2-Wire Fans Figure 22 shows how a 2-wire fan may be connected to the ADM1027. This circuit allows the speed of a 2-wire fan to be measured even though the fan has no dedicated TACH signal. A series ...

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FAN SPEED MEASUREMENTS TACH Inputs Pins 11, 12, 9, and 14 are open-drain TACH inputs intended for fan speed measurement. Signal conditioning in the ADM1027 accommodates the slow rise and fall times typical of fan tachometer outputs. The maxi- mum ...

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ADM1027 Fan Speed Measurement Registers The fan tachometer readings are 16-bit values consisting of a 2-byte read from the ADM1027. Reg. 0x28 TACH1 Low Byte = 0x00 default Reg. 0x29 TACH1 High Byte = 0x00 default Reg. 0x2A TACH2 Low ...

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Fan Speed Measurements The ADM1027 is capable of measuring the speed of 2-wire fans, i.e., fans without TACH outputs this, the fan must be interfaced as shown in the Fan Drive Circuitry section of the data sheet. ...

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ADM1027 MANUAL FAN SPEED CONTROL MODE PWM Logic State The PWM outputs can be programmed to be high for 100% duty cycle (noninverted) or low for 100% duty cycle (inverted). PWM1 Configuration (Reg. 0x5C) <4> INV 0 = logic high ...

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AUTOMATIC FAN SPEED CONTROL MODE The ADM1027 has a local temperature sensor and two remote temperature channels that may be connected to an on-chip diode-connected transistor on a CPU. These three temperature channels may be used as the basis for ...

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ADM1027 Step 1 Determine the Hardware Configuration Essentially this means choosing whether to use Pin PWM2 output SMBALERT output and deciding which SMBus address used. To set Pin 10 as SMBALERT, ...

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Step 2 Configuring the Mux: Which Temperature Controls Which Fan? Having decided on the system hardware configuration, the fans can be assigned to particular temperature channels. Not only can fans be assigned to individual channels, but how a fan behaves ...

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ADM1027 Step 3 Determine T Setting for Each Thermal Channel MIN T is the temperature at which the fans will start to turn on MIN under automatic fan control. The speed at which the fan runs programmed ...

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Step 4 Determine PWM for Each PWM (Fan) Output MIN PWM is the minimum PWM duty cycle that each fan in the MIN system will run at also the start speed for each fan under automatic fan control ...

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ADM1027 Step 5 Determine T for Each Temperature Channel RANGE T is the range of temperature over which automatic fan RANGE control occurs once the programmed T been exceeded actually a temperature slope and not RANGE an arbitrary ...

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Example: Calculate T , given T MAX MIN and PWM = 33% duty cycle = 85 decimal MIN ( T T MaxD MinD MAX MIN ( ) ...

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ADM1027 Step 6 Determine T for Each Temperature Channel THERM T is the absolute maximum temperature allowed on a THERM temperature channel. Above this temperature, a component such as the CPU or VRM may be operating beyond its safe operating ...

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Step 7 Determine T for Each Temperature Channel HYST T is the amount of extra cooling a fan provides after the HYST measured temperature has dropped back below T fan turns off. The premise for temperature hysteresis (T is that ...

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ADM1027 ENHANCING SYSTEM ACOUSTICS Automatic fan speed control mode reacts instantaneously to changes in temperature, i.e., the PWM duty cycle will respond immediately to temperature change. Any impulses in tempera- ture can cause an impulse in fan noise. For psycho-acoustic ...

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Enabling Acoustic Enhancement for Each PWM Output ENHANCED ACOUSTICS REGISTER 1 (Reg. 0x62) <3> enables acoustic enhancement on PWM1 output. ENHANCED ACOUSTICS REGISTER 2 (Reg. 0x63) <7> enables acoustic enhancement on PWM2 output. <3> ...

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ADM1027 CHOOSING RAMP RATE FOR ACOUSTIC ENHANCEMENT The optimal ramp rate for acoustic enhancement can be found through system characterization after the thermal optimization has been finished. Each ramp rate’s effects should be logged, if possible, to determine the best ...

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OPERATING FROM 3.3 V STANDBY The ADM1027 has been specifically designed to operate from a 3.3 V STBY supply. In computers that support S3 and S5 states, the core voltage of the processor will be lowered in these states. Note ...

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ADM1027 Address R/W Description 0x20 R 2.5 V Reading 0x21 R V Reading CCP 0x22 R V Reading CC 0x23 Reading 0x24 Reading 0x25 R Remote 1 Temperature 0x26 R Local Temperature 0x27 R ...

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Address R/W Description 0x5C R/W PWM1 Configuration Register 0x5D R/W PWM2 Configuration Register 0x5E R/W PWM3 Configuration Register 0x5F R/W Remote 1 T /PWM 1 Freq RANGE 0x60 R/W Local T /PWM 2 Freq RANGE 0x61 R/W Remote 2 T ...

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ADM1027 Table V. Voltage Reading Registers (Power-On Default = 0x00) Register Address R/W 0x20 Read-Only 0x21 Read-Only 0x22 Read-Only 0x23 Read-Only 0x24 Read-Only If the extended resolution bits of these readings are also being read, the extended resolution registers (Reg. ...

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Table VIII. Current PWM Duty Cycle Registers (Power-On Default = 0xFF) Register Address R/W 0x30 Read/Write 0x31 Read/Write 0x32 Read/Write These registers reflect the PWM duty cycle driving each fan at any given time. When in automatic fan speed control ...

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ADM1027 Table X. Register 0x41 – Interrupt Status Register 1 (Power-On Default = 0x00) Bit Name Read/Write <0> 2.5 V Read-Only <1> V Read-Only CCP <2> V Read-Only CC <3> Read-Only <4> R1T Read-Only <5> LT Read-Only <6> ...

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Table XII. Register 0x43 – VID Register (Power-On Default = 0x00 ) Bit Name R/W <4:0> VID[4:0] Read-Only <7:5> Reserved Read-Only Register Address R/W 0x44 Read/Write 0x45 Read/Write 0x46 Read/Write 0x47 Read/Write 0x48 Read/Write 0x49 Read/Write 0x4A Read/Write 0x4B Read/Write ...

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ADM1027 Register Address R/W 0x54 Read/Write 0x55 Read/Write 0x56 Read/Write 0x57 Read/Write 0x58 Read/Write 0x59 Read/Write 0x5A Read/Write 0x5B Read/Write Exceeding any of the TACH limit registers by 1 indicates that the fan is running too slowly or has stalled. ...

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Register Address R/W 0x5F Read/Write 0x60 Read/Write 0x61 Read/Write Bit Name Read/Write <2:0> FREQ Read/Write <3> Reserved Read/Write <7:4> RANGE Read/Write These registers become read-only when the Configuration Register 1 lock bit is set. Any further attempts to write to ...

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ADM1027 Table XVIII. Register 0x62 – Enhance Acoustics Register 1 (Power-On Default = 0x00) Bit Name R/W <2:0> ACOU Read-Only <3> EN1 Read/Write <4> Reserved Read-Only <5> MIN1 Read/Write <6> MIN2 Read/Write <7> MIN3 Read/Write This register becomes read-only when ...

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Table XIX. Register 0x63 – Enhance Acoustics Register 2 (Power-On Default = 0x00) Bit Name R/W <2:0> ACOU3 Read/Write <3> EN3 Read/Write <6:4> ACOU2 Read/Write <7> EN2 Read/Write This register becomes read-only when the Configuration Register 1 lock bit is ...

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ADM1027 Register Address R/W 0x64 Read/Write 0x65 Read/Write 0x66 Read/Write Bit Name Read/Write <7:0> PWM Duty Read/Write These registers become read-only when the ADM1027 is in automatic fan control mode. Register Address R/W 0x67 Read/Write 0x68 Read/Write 0x69 Read/Write These ...

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Register Address R/W 0x6F Read/Write <0> XEN <7:1> Reserved This register becomes read-only when the Configuration Register 1 lock bit is set to 1. Any further attempts to write to this register will have no effect. Register Address R/W 0x70 ...

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ADM1027 Table XXVIII. Register 0x73 – Configuration Register 2 (Power-On Default = 0x00) Bit Name R/W 0 AIN1 Read/Write 1 AIN2 Read/Write 2 AIN3 Read/Write 3 AIN4 Read/Write 4 AVG Read/Write 5 ATTN Read/Write 6 CONV Read/Write ` 7 Reserved ...

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Table XXIX. Register 0x74 – Interrupt Mask Register 1 (Power-On Default <7:0> = 0x00) Bit Name R/W 0 2.5 V Read/Write 1 V Read/Write CCP 2 V Read/Write Read/Write 4 R1T Read/Write 5 LT Read/Write 6 ...

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ADM1027 Table XXXIII. Register 0x78 – Configuration Register 3 (Power-On Default = 0x00) Bit Name R/W <0> ALERT Read/Write <1> Reserved Read/Write <2> Reserved Read/Write <3> FAST Read/Write <4> DC1 Read/Write <5> DC2 Read/Write <6> DC3 Read/Write <7> DC4 Read/Write ...

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Table XXXV. Register 0x7E – Manufacturer’s Test Register 1 (Power-On Default = 0x00) Bit Name Read/Write <7:0> Reserved Read-Only This register becomes read-only when the Configuration Register 1 lock bit is set to 1. Any further attempts to write to ...

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