E-L6258EP STMICROELECTRONICS [STMicroelectronics], E-L6258EP Datasheet - Page 9

• Manufacturer Part Number: E-L6258EP
• Description: PWM CONTROLLED - HIGH CURRENT DMOS UNIVERSAL MOTOR DRIVER
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Figure 6. Output comparator waveforms
In the case of V
the two comparators are signals having the same phase and 50% of duty cycle .
As we have already mentioned, in this situation, the two outputs OUT_A and OUT_B are simultaneously driven
from V
motor winding.
With a positive differential voltage on V
respected Vr.
In this case being the error amplifier output voltage greater than Vr, the output of the first comparator is a square
wave with a duty cycle higher than 50%, while the output of the second comparator is a square wave with a duty
cycle lower than 50%.
The variation in duty cycle obtained at the outputs of the two comparators is the same, but one is positive and
the other is negative with respect to the 50% level.
The two driving signals, generated in this case, drive the two outputs in such a way to have switched current
flowing from OUT_A through the motor winding to OUT_B.
With a negative differential voltage V
In this case the output of the first comparator is a square wave with a duty cycle lower than 50%, while the output
of the second comparator is a square wave with a duty cycle higher than 50%.
The variation in the duty cycle obtained at the outputs of the two comparators is always of the same.
The two driving signals, generated in this case, drive the the two outputs in order to have the switched current
flowing from OUT_B through the motor winding to OUT_A.
3.7 Current Control Loop Compensation
In order to have a flexible system able to drive motors with different electrical characteristics, the non inverting
input and the output of the error amplifier ( EA_OUT ) are available.
Connecting at these pins an external RC compensation network it is possible to adjust the gain and the band-
width of the current control loop.
s
to ground ; and the differential voltage across the load in this case is zero and no current flows in the
DAC
Error Ampl.
First Comp.
Output
Second Comp.
Output
Output
Tri_180
equal to zero, the transconductance loop is balanced at the value of Vr, so the outputs of
Tri_0
DAC
DAC
, the transconductance loop will be negatively unbalanced respected Vr.
(see Fig. 5), the transconductance loop will be positively unbalanced
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