MC44S803EP FREESCALE [Freescale Semiconductor, Inc], MC44S803EP Datasheet
MC44S803EP
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MC44S803EP Summary of contents
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... Control I/O Figure 1. MC44S803 Functional Block Diagram MC44S803 Rev 2.0, 09/2008 MC44S803 LOW POWER CMOS BROADBAND TUNER EP SUFFIX 64-LEAD QFN PACKAGE CASE 1606-01 ORDERING INFORMATION Temp. Device Package RoHS Range MC44S803EP 0° QFN +85°C BPF IF AGC Control Amp Digital Analog Regulator 3.3 V yes ...
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Typical applications for the MC44S803 include cable data modems, cable TV (CATV) set-top boxes (analog & digital), computer TV tuner cards (analog & digital), analog TV sets, 48 – 1000 MHz Diff 58 RF Input 59 LNA 61 Pre RF ...
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Table 1 lists the pin out of the MC44S803. In addition to the 64 leads, there is a grounding pad on the bottom of the package, which is soldered to the PCB. Table 1. Pin Descriptions (Listed by Pin Number) ...
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Table 2. Absolute Maximum Ratings Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute maximum ...
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Table 6. Tuner Performance (Low Power Settings) Data for VCC = 3.3V, 25C RFAGC for minimum attenuation = 2.0V Parameter Supply Current — Low power mode Supply Current — All blocks shutdown Noise Figure Channel 57 MHz Noise Figure Channel ...
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Table 7. Tuner Performance (High Power Settings) Data for V = 3.3 V, 25°C, RFAGC for minimum attenuation = 2 Parameter Supply Current — Nominal power mode Supply Current — All blocks shutdown Noise Figure Channel 57 MHz ...
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Figure 3. RFinput Impedance MC44S803 Drawing Freescale Semiconductor MC44S803 7 ...
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The digital control interface has the capability to interface with Serial Peripheral Interface (SPI are shared between the two buses. A Bus Select pin, (BusSel), as shown in Table 8, is used to determine which bus will be ...
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The following flowchart is provided to show the steps required to read out a particular Data Register. Note that when using the SPI interface, since there are separate lines for data in (MOSI) and data out (MISO), each SPI operation ...
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SPI TIMING SPI buses can have one of four serial clock phase and polarity combinations. Freescale microcontrollers should be configured using CPOL = 0 and clock phase, CPHA = 0. See the product documentation for more information. A clock polarity ...
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INTER- INTERFACE TIMING MSB IC Address R/W S Slave SDA AD7 AD1 0 SCLK t HD;STA Start Condition Sample Input MSB IC Address R/W S Slave Ack SDA AD7 AD1 1 SCLK Start Condition ...
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Each Control Register controls a different area of the IC. The description of each register follows. CONTROL REGISTER FORMAT There is a set of control registers that are programmed to tune and adjust the IC. Which particular control register is ...
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Table 13. Power Down Bit Table Bit REFERENCE OSCILLATOR REGISTER (CR-1) The Reference Oscillator register contains bits that affect the ...
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MSB Osc Sel Table 14. Oscillator Sel Bit PROGRAMMABLE R1 & R2 REFERENCE DIVIDERS REGISTER (CR-2) Selects the First and Second LO reference frequencies, which are divided down from the ...
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Table 15. R3 Divide Ratio Divide Ratio Table 16. Sine Wave Buffer Configuration Condition R8 R7 The Reference switches allow the Buffer In/Out pins to be reconfigured so that ...
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Table 17. Reset State Table State Not In Reset In Reset LOCAL OSCILLATOR 1 REGISTER (CR-5) The N1 divider consists bit N counter. The range of N1 values is from 2 to 4097. The serial data format ...
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Table 20. 15 Bit N Counter Control Bits (N2) N Counter N14 N15 N12 Value 4310 32769 Counter Value Functions (N2) The ...
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The Power Adjust bits put their respective amplifiers into Low Power mode, which consumes half the power. For bits LP3 and LP5 a 1 puts the amplifier in low power mode and a 0 puts it in nominal mode. For ...
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Table 26. Test Pin Function List A Test TA3 TA2 Function # ...
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DIGITAL TUNE MODULE (CR-9) CR-9 is unique in that CR-9 register data is latched with the crystal clock while all other registers are latched with the SPI/I2C clock. Therefore, the crystal oscillator must be running before data is written to ...
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MSB R19 R18 R17 R16 R15 R14 R13 R12 R11 R10 MT2 AT2 Figure 20. Digital Tune Register: ...
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LNA AGC REGISTER (CR-10) The variable gain LNA (Low Noise Amplifier) is used to provide automatic gain control (AGC) at the RF frequency. The gain is varied with an external analog control voltage or digitally via the interface bus using ...
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MSB Address Bits Data Address Figure 24. Data Address Register Format There are 16 Data Registers that can be read back from ...
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REGULATOR TEST DATA REGISTER (REGTEST) The regulator comparator test compares the internal regulator voltages to reference voltages. A low voltage and high voltage test can be run. The type of test is determined by the Reg Test Low bit in ...
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Table 34. VCO Test Register Field Description LSB MSB CURRENT LNA GAIN DATA REGISTER (LNAGain) This register holds the current LNA gain setting in the 6 MSBs of the register. When controlled by an external analog control, the analog voltage ...
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The CLRF and CLIF bits of the Circuit Adjust register (CR-7), change the response time of RF and IF detectors, respectively. When set to instantaneous mode (1), the corresponding detector reads the instantaneous voltage peak. When set to normal mode ...
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APPLICATIONS INFORMATION — SAMPLE SYSTEM DESIGN Figure 30 shows a simplified block diagram for a sample system design. Note that the upstream and downstream frequency bands overlap. These are the limits of the frequency ranges. The actual bands are adjusted ...
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The Second IF consists of the on chip amplifiers that boost the signal level so that it is high enough for the tuner to be directly connected to the demodulator. The output of Post Amp 2 is routed off chip ...
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The integrated reference oscillator requires an external crystal. The oscillator circuit is designed to accept a crystal in the frequency range of 4.0 MHz to 28 MHz. The oscillator drives the reference dividers for LO1 and LO2. Additionally, it goes ...
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Silicon Tuner IC Crystal Oscillator SW1 Buffer Crystal Input Silicon Tuner IC Crystal Oscillator SW1 Buffer Crystal Input Figure 34. Two Receivers and Modulator Sharing One Crystal The CMOS Broadband Tuner IC is designed to work with a crystal meeting ...
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TYPICAL APPLICATION CONFIGURATIONS Figure 35 and Figure 36 are block diagrams that show how the Silicon Tuner is used in multiple applications. F-Connector Mixer RF In HPF Amp LPF Upstream RF AGC Control F-Connector Mixer RF In HPF Amp LPF ...
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F-Connector Amp RF In Splitter HPF LPF Upstream RF AGC Controls Amp AGC Controls Amp AGC Control Figure 36. Settop Box or Media Gateway with Two Digital/Analog TV Tuners and Broadband Modem Tuner MC44S803 ...
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This IC package Pb-free 64 pin Quad Leadless Package (QFN) with a grounding pad on the bottom of the package. The QFN is similar to a QFP except the leads wrap Freescale Semiconductor PACKAGE DIMENSIONS around the ...
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MC44S803 34 PACKAGE DIMENSIONS CASE 1606-01 ISSUE O 64-LEAD QFN PACKAGE PAGE Freescale Semiconductor ...
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Freescale Semiconductor PACKAGE DIMENSIONS CASE 1606-01 ISSUE O 64-LEAD QFN PACKAGE PAGE MC44S803 35 ...
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How to Reach Us: Home Page: www.freescale.com E-mail: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 +1-800-521-6274 or +1-480-768-2130 support@freescale.com Europe, Middle East, and Africa: Freescale Halbleiter Deutschland ...