BD9285F ROHM [Rohm], BD9285F Datasheet
BD9285F
Available stocks
Related parts for BD9285F
BD9285F Summary of contents
Page 1
... For large LCDs BD9285F ● ● ● ● General Description BD9285F is a high efficiency driver for white LEDs and designed for large LCDs. This IC is built-in a boost DCDC converters that employ an array of LEDs as the light source. BD9285F has some protect function against ...
Page 2
... BD9285F ●Absolute Maximum Ratings (Ta=25℃) Parameter Input voltage STB pin voltage OVP, UVLO, SS, RT, ISENSE, FB, CS, TC54 pin voltage PWM1, PWM2, FAILB, ADIM, ADIM_P pin voltage DIMOUT, GATE pin voltage Power Dissipation Operating Temperature Range Junction Temperature Storage Temperature Range *1 Pd derated at 5.5 mW/℃ for temperature above Ta=25℃, mounted on 70mm× ...
Page 3
... BD9285F ●1.1 Electrical character (Unless otherwise specified Ta=25℃，VCC=12V) Parameter Symbol 【 【 【 【 Total current consumption】 】 】 】 Circuit current Icc Standby current IST 【 【 【 【 UVLO block】 】 】 】 Operation voltage（VCC） ...
Page 4
... BD9285F ●1.2 Electrical character (Unless otherwise specified Ta=25℃，VCC=12V) Parameter Symbol 【 【 【 【 LED protection block】 】 】 】 LED OCP detect voltage VLEDOCP LED OPEN detect voltage VOPEN 【 【 【 【 Analog dimming block】 】 】 】 ...
Page 5
... BD9285F ● ● ● ● 1.3 Pin number, pin name, pin function No. name IN/OUT 1 OVP In Over voltage protection detection pin 2 UVLO In Under voltage lock out detection pin 3 SS Out Slow start setting pin 4 RT Out For DC/DC switching frequency setting pin 5 PWM1 In External PWM dimming signal input pin1 ...
Page 6
... BD9285F ●2.1.1 Pin ESD Type OVP RT ADIM ADIM 20k 5V 10k 5V GATE VCC GATE 100k GND www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 UVLO UVLO 50k 5V PWM1, PWM2 ADIM_P ADIM_P 10k 5V 200k STB STB 780k 650k Figure 4-1. Internal equivalent circuit ...
Page 7
... BD9285F ●2.1.2 Pin ESD Type FB ●2.2 Block diagram VCC VCC TC54 VREG STB REG54 UVLO RT OSC Css SS SS SS-FB clamper FAILB Fail detect PWM1 PWM2 4.0V ADIM_P 1.5V ADIM www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 CS Figure 4-2. Internal equivalent circuit ...
Page 8
... BD9285F ●2.3 Typical performance Curves 2.0 1.5 1.0 0.5 0 VCC[V] Figure 6. Operating current (ICC) vs VCC 120 100 0.5 1.5 2.5 FB[V] Figure 8. FB sink current vs FB voltage 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 ADIM[V] Figure 10. ISENSE feedback voltage vs ADIM www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 ...
Page 9
... BD9285F ●2.4 Pin function description ○ ○ ○ ○ Pin1: OVP The OVP terminal is the input for over-voltage protection and short circuit protection of output voltage. As OVP is more than 3.0V, the over-voltage protection (OVP) will work. On the other hand, OVP is lower than 0.2V, the short circuit protection (SCP) will work ...
Page 10
... Normal Abnormal ○ ○ ○ ○ Pin8: ADIM The input output pin for analog dimming signal. The pin function can be changed according to the input level of ADIM_P pin. The pulse-DC transform circuit is included into BD9285F. ADIM_P input level -0.3V<ADIM_P<3.8V 4.2V <ADIM_P<5.6V Analog dimming ...
Page 11
... BD9285F is decreased, on the other hand, the transient response is delayed. And please keep in mind the error voltage if the pull down resistor of ADIM pin will be connected. ○ ○ ○ ○ Pin9: ADIM_P The pulse signal input pin for analog dimming. Please pull up the voltage level more than 4.2V(typ.), when DC signal is used for the analog dimming. In normal operation, please set the input voltage under 5.6V. For more details, please refer to < ...
Page 12
... BD9285F is hold to the external capacitance. (For more detail on the compensation setting is described in the section " 3.6 loop compensation".) ○ ○ ○ ○ Pin17: CS The CS pin has two functions current mode Feedback terminal The inductor current is converted to the CS pin voltage by the sense resistor R and this CS pin voltage controls the output voltage by compared with the error amp output ...
Page 13
... BD9285F ●3.1 Application circuit example The bellows are example circuits of using BD9285F. ・ ・ ・ ・ The basic application circuit example Css ・ ・ ・ ・ As for the dimming signal, the single PWM and the DC for analog dimming Figure 17. the circuit example with single PWM (1) www.rohm.com © ...
Page 14
... TC54 BD9285F STB STB GATE FAILB FAILB PWM1 PWM1 PWM2 PWM2 DIMOUT ADIM_P ADIM_P ISENSE ADIM FB GND VCC UVLO OVP TC54 BD9285F STB STB GATE FAILB PWM1 PWM1 PWM2 PWM2 DIMOUT ADIM_P ISENSE ADIM FB GND 14/36 Datasheet TSZ02201-0F1F0C100030-1-2 11.Jul.2012 Rev.001 ...
Page 15
... BD9285F ●3.2 The detection condition list of the protection (TYP. Condition) Detectio Protection n pin pin condition LED OPEN ISENSE ISENSE < 0.1V LED OCP ISENSE ISENSE > 4.0V UVLO UVLO UVLO<2.8V TC54 UVLO TC54 TC54<2.4V VCC UVLO VCC VCC<7.2V OVP OVP OVP>3.0V SCP OVP OVP<0.2V OCP CS CS> ...
Page 16
... BD9285F ●3.4 External components selection ●3.4.1 The start up operation and the setting of Soft Start external capacitance The below explanations are the start up sequency of BD9285. ① STB FB OSC PWM GATE ② VOUT ③ ILED ④ LED_OK ⑤ Figure 21. the turn-on waveform ○ ○ ○ ○ The explanation of start up sequency ① ...
Page 17
... BD9285F ●3.4.2 how to shutdown and set TC54 capacitance This IC is equipped the discharge function when shutdown is operated. ○ ○ ○ ○ Explanation of shutdown sequence ① When STB=L, DC/DC and TC54 are stop. ② When STB=L, TC54UVLO=H, the DIMOUT logic asserts the PWM logic. The voltage of TC54 (5.4V) will decrease by the constant current -10uA and is discharged to 2.4V. ③ ...
Page 18
... BD9285F ●3.4.4 . how to set DCDC oscillation frequency R which connects to RT pin set the oscillation frequency of DCDC. RT ○ the relationship between OSC and R where fsw is the oscillation frequency of DCDC [kHz] This equation is an ideal equation in which correction factors are not applied. The adequate verification with an actual set needs to be performed to set frequency precisely. ...
Page 19
... BD9285F ●3.4.5. how to set UVLO Under voltage lock out pin for the input voltage of the power stage. More than 3.0V(typ.), IC starts boost operation and stops lower than 2.8V(typ.). The UVLO pin is high impedance, because the internal resistance to a certain bias is not connected. ...
Page 20
... BD9285F ●3.4.6. how to set OVP, SCP The OVP terminal is the input for over-voltage protection and short circuit protection of output voltage. The OVP pin is high impedance, because the internal resistance to a certain bias is not connected. So, the bias by the external components is required, even if OVP function is not used, because the open connection of this pin is not fixed the potential ...
Page 21
... BD9285F ●3.4.7. how to set the interval until latch off BD9285 built in the counter by latch off time, that is performed by counting the oscillation clock which is set by the RT pin. Since the common oscillation circuit is used for counting, the interval until latch off is corresponding to the 4096 clock, which the GATE pulse output continuously ...
Page 22
... BD9285F ●3.5. DCDC parts selection 3.5.1. how to set OCP / the calculation method for the current rating of DCDC parts BD9285 stops the switching by the OCP detect, when the CS pin voltage is more than 0.5V. The resistor value of CS pin, R need to be considered by the coil L current. And the current rating of DCDC external parts is required more than the CS peak current of the coil ...
Page 23
... BD9285F The DCDC input voltage of the power stage = VIN [V] = 24V The efficiency of DCDC = η [%] = 90% The averaged input current IIN is calculated as the following OUT And the ripple current of the inductor L ( Δ IL[A]) can be calculated if the switching frequency, fsw = 200kHz, the inductor, L=100µ ...
Page 24
... BD9285F 3.5.2. Inductor selection Δ OUT OUT Figure 29. the waveform and the circuit of inductor current * The current exceeding the rated current value of inductor flown through the coil causes magnetic saturation, results in decreasing in efficiency. Inductor needs to be selected to have such adequate margin that peak current does not exceed the rated current value of the inductor ...
Page 25
... BD9285F ●3.6. Loop compensation A current mode DCDC converter has each one pole (phase lag) f and the output resistance (= LED current) and zero (phase lead) f capacitor. Moreover, a step-up DCDC converter has RHP zero (right-half plane zero point) f converter. This zero may cause the unstable feedback. To avoid this by RHP zero, the loop compensation that the cross-over frequency f set as following, is suggested ...
Page 26
... BD9285F ●3.7. Timing chart 3.7.1 starting up 1 (STB inputs and PWM signal succeeds) 7.5V VCC STB PWM1 andPWM2 TC54 V5UVLO SS GATE FAILB OFF (*1) (*1)…TC54 starts up if STB turns from The pin SS is not charged in the state that the PWM signal is not input, the boost is not started. (*2)… ...
Page 27
... BD9285F 3.7.2 starting up 2 (PWM signal inputs and STB succeeds) (*1)…TC54 starts up if STB turns from (*2)…At the moment the release of V5UVLO (the UVLO of the pin TC54), or the time of the positive edge of PWM the soft start starts. The GATE pulse outputs only during PWM1=H. And as the SS is less than 1.1V, the pulse does not output. ...
Page 28
... SS ON (*1)…As STB pin turns High to Low, BD9285F stops the boost operation, starts the discharge of TC54. (*2)…During STB=L and V5UVLO=H, the DIMOUT asserts the same logic of PWM. TC54=5.4V is discharged until 2.4V by the constant current 10uA. And IC turns off. Vout need to be discharged adequately so that LED does not turns on drastically at the next start up. For detailed instructions, please refer the section 3.4.2 “ ...
Page 29
... BD9285F 3.7.4 the soft start function (*1)…The SS pin charge does not start by just STB=H. “PWM1=H and PWM2=H” is required to start the soft start. In the low SS voltage, the GATE pin duty is depend on the SS voltage. And as the SS is less than 1.1V, the pulse does not output. ...
Page 30
... BD9285F 3.7.5 the OVP detection (*1)…As OVP is detected, the output GATE=L, DIMOUT=L, and the CP counter starts (*2)…If OVP is released within 4 clock of CP counter of the GATE pin frequency, the boost operation restarts. (*3)…As the OVP is detected again, the boost operation is stopped . (*4)…As the OVP detection continues count by the CP counter, IC will be latched off. ...
Page 31
... BD9285F 3.7.6 the SCP detection (*1)…During the soft start, the detection of SCP is masked. (*2)…As SCP is detected, the output GATE=L, DIMOUT=L, and the CP counter starts (*3)…If SCP is released within 4096 clock of CP counter of the GATE pin frequency, the boost operation restarts. (*4)…As the SCP is detected again, the boost operation is stopped . ...
Page 32
... BD9285F 3.7.7 LED OPEN detection STB PWM1and PWM2 0.1V ISENSE GATE CPcountor SS 1.1V DIMOUT FAILB STATE OFF STANDBY (*1) (*1)…During starting up, even if the normality, ISENSE<0.1V because of the low Vout. Therefore the OPEN detection will be masked for the soft start period. (*2)…In the same way, as PWM=L, ISENSE<0.1V because of DIMOUT=L. OPEN will be masked, too. ...
Page 33
... BD9285F 3.7.8 LED OCP detection (*1)…If ISENSE>4.0V, LEDOCP is detected, it becomes GATE=L. To detect LEDOCP continuously, The DIMOUT is compulsorily high, regardless of the PWM dimming signal. (*2)…When the LEDOCP releases within the GATE frequency 4096 counts of the CP counter, the boost operation restarts. (*3) …As the LEDOCP is detected again, the boost operation is stopped, too. ...
Page 34
... BD9285F 3.7.9 the spontaneous detection OVP and OPEN. STB OVP INSENSE 0.1V CP COUNTOR SS GATE DIMOUT FAILB STATE NORMAL (*1) (*1)…The time chart shows the OPEN detects faster and does not reach to the latch off state. The DIMOUT asserts high. (*2)…If OPEN and OVP is detected spontaneously, OVP has the priority, and GATE=L, DIMOUT=L. ...
Page 35
... BD9285F ● ● ● ● Operational Notes 1.) This product is produced with strict quality control, but might be destroyed if used beyond its absolute maximum ratings including the range of applied voltage or operation temperature. Failure status such as short-circuit mode or open mode can not be estimated special mode beyond the absolute maximum ratings is estimated, physical safety countermeasures like fuse needs to be provided ...
Page 36
... BD9285F ● ● ● ● Ordering Information Part Number ● ● ● ● Physical Dimension Tape and Reel Information SOP18 11.2 0.2 (MAX 11.55 include BURR 0.1 1.27 0.4 0.1 ● ● ● ● Marking Diagram (TOP VIEW) SOP18(TOP VIEW www.rohm.com © ...
Page 37
Precaution 1) Before you use our Products, you are requested to carefully read this document and fully understand its contents. ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use ...
Page 38
Mounting / Circuit board design 1) When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product performance and reliability principle, the reflow soldering method must be used; ...
Page 39
Precaution 1) The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible ...