NLAST44599_05 ONSEMI [ON Semiconductor], NLAST44599_05 Datasheet

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NLAST44599_05

Manufacturer Part Number
NLAST44599_05
Description
Low Voltage Single Supply Dual DPDT Analog Switch
Manufacturer
ONSEMI [ON Semiconductor]
Datasheet
NLAST44599
Low Voltage Single Supply
Dual DPDT Analog Switch
DPDT (double pole−double throw) analog switch, fabricated with
silicon gate CMOS technology. It achieves high−speed propagation
delays and low ON resistances while maintaining CMOS low−power
dissipation. This DPDT controls analog and digital voltages that may
vary across the full power−supply range (from V
lower and more linear over input voltage than R
analog switches.
voltages between 0 V and 5.5 V are applied, regardless of the supply
voltage. This input structure helps prevent device destruction caused
by supply voltage − input/output voltage mismatch, battery backup,
hot insertion, etc.
demultiplexer analog switch with two Select pins that each controls
two multiplexer−demultiplexers.
 Semiconductor Components Industries, LLC, 2005
February, 2005 − Rev. 7
The NLAST44599 is an advanced CMOS dual−independent
The device has been designed so the ON resistance (R
The channel−select input structure provides protection when
The NLAST44599 can also be used as a quad 2−to−1 multiplexer−
Select Pins Compatible with TTL Levels
Channel Select Input Overvoltage Tolerant to 5.5 V
Fast Switching and Propagation Speeds
Break−Before−Make Circuitry
Low Power Dissipation: I
Diode Protection Provided on Channel Select Input
Improved Linearity and Lower ON Resistance over Input Voltage
Latch−up Performance Exceeds 300 mA
ESD Performance: Human Body Model > 2000 V;
Chip Complexity: 158 FETs
Pb−Free Packages are Available
Machine Model > 200 V
CC
= 2 mA (Max) at T
ON
CC
A
of typical CMOS
to GND).
= 25°C
ON
) is much
1
16
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
CASE 485G
MN SUFFIX
QFN−16
CASE 948F
TSSOP−16
DT SUFFIX
ORDERING INFORMATION
A
L
Y
W
1
http://onsemi.com
= Assembly Location
= Wafer Lot
= Year
= Work Week
Publication Order Number:
1
DIAGRAMS
16
16
MARKING
(TOP VIEW)
1
NLAST44599/D
ALYW
NLAST
ALYW
4459
T

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NLAST44599_05 Summary of contents

Page 1

NLAST44599 Low Voltage Single Supply Dual DPDT Analog Switch The NLAST44599 is an advanced CMOS dual−independent DPDT (double pole−double throw) analog switch, fabricated with silicon gate CMOS technology. It achieves high−speed propagation delays and low ON resistances while maintaining CMOS ...

Page 2

QFN−16 PACKAGE SAB See TSSOP−16 Switch Configuration COM TSSOP−16 PACKAGE COM ELECT ...

Page 3

MAXIMUM RATINGS Symbol V Positive DC Supply Voltage CC V Analog Input Voltage ( Digital Select Input Voltage Current, Into or Out of Any Pin IK P Power Dissipation in Still Air ...

Page 4

DC CHARACTERISTICS − Digital Section (Voltages Referenced to GND) Symbol Parameter V Minimum High−Level Input IH Voltage, Select Inputs V Maximum Low−Level Input IL Voltage, Select Inputs I Maximum Input Leakage IN Current I Power Off Leakage Current, OFF Select ...

Page 5

AC ELECTRICAL CHARACTERISTICS Symbol Parameter t Turn−On Time ON (Figures 12 and 13) t Turn−Off Time OFF (Figures 12 and 13) t Minimum Break−Before−Make BBM Time *Typical Characteristics are at 25°C. C Maximum Input Capacitance, Select Input ...

Page 6

DUT V Output CC 0.1 mF 300 W Switch Select Pin DUT V Output CC 0.1 mF Open Input DUT Output Open Input V CC Input GND V OUT 35 pF Output GND Figure 4. t (Time Break−Before−Make) BBM V ...

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W Generator Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is the bandwidth switch. V ISO V = Off Channel Isolation = 20 Log ISO V = ...

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Off Isolation −60 −80 −100 0.01 0.1 1 FREQUENCY (MHz) Figure 10. Off−Channel Isolation (ns (ns) 5 OFF 0 2 (VOLTS) CC Figure 12. t ...

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0.001 0.0001 0.00001 −40 − Temperature (°C) Figure 16. I vs. Temp 100 125°C ...

Page 10

V (VDC) IS Figure 22. R vs. Temp DEVICE ORDERING INFORMATION Circuit Device Order Indicator Number Technology NLAST44599DT NL NLAST44599DTR2 NL ...

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D Î Î Î Î Î Î PIN 1 Î Î Î LOCATION 0.15 C TOP VIEW 0.15 C (A3) 0. SIDE VIEW 16X 5 8 NOTE 16X ...

Page 12

K 16X REF 0.10 (0.004) 0.15 (0.006 L PIN 1 IDENT. 1 0.15 (0.006 −V− C 0.10 (0.004) −T− SEATING D PLANE ON Semiconductor and are registered trademarks of Semiconductor ...

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