74ABT245CMTCX_NL FAIRCHILD [Fairchild Semiconductor], 74ABT245CMTCX_NL Datasheet

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74ABT245CMTCX_NL

Manufacturer Part Number
74ABT245CMTCX_NL
Description
Octal Bi-Directional Transceiver with 3-STATE Outputs
Manufacturer
FAIRCHILD [Fairchild Semiconductor]
Datasheet
©1991 Fairchild Semiconductor Corporation
74ABT245 Rev. 1.4
74ABT245
Octal Bi-Directional Transceiver with 3-STATE Outputs
Features
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
Pb-Free package per JEDEC J-STD-020B.
Note:
1. Device available in Tape and Reel only.
74ABT245CSC
74ABT245CSJ
74ABT245CMSA
74ABT245CMTC
74ABT245CMTCX_NL
Bidirectional non-inverting buffers
A and B output sink capability of 64mA, source
capability of 32mA
Guaranteed output skew
Guaranteed multiple output switching specifications
Output switching specified for both 50pF and 250pF
loads
Guaranteed simultaneous switching, noise level and
dynamic threshold performance
Guaranteed latchup protection
High-impedance, glitch-free bus loading during entire
power up and power down cycle
Nondestructive, hot-insertion capability
Disable time is less than enable time to avoid bus
contention
Order Number
(1)
Package
Number
MSA20
MTC20
MTC20
M20B
M20D
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013,
0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150,
5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC
MO-153, 4.4mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC
MO-153, 4.4mm Wide
General Description
The ABT245 contains eight non-inverting bidirectional
buffers with 3-STATE outputs and is intended for bus-
oriented applications. Current sinking capability is 64 mA
on both the A and B ports. The Transmit/Receive (T/R)
input determines the direction of data flow through the
bidirectional transceiver. Transmit (active HIGH) enables
data from A Ports to B Ports; Receive (active LOW)
enables data from B Ports to A Ports. The Output Enable
input, when HIGH, disables both A and B ports by plac-
ing them in a HIGH Z condition.
Package Description
www.fairchildsemi.com
March 2007
tm

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74ABT245CMTCX_NL Summary of contents

Page 1

... Ordering Information Order Number 74ABT245CSC 74ABT245CSJ 74ABT245CMSA 74ABT245CMTC (1) 74ABT245CMTCX_NL Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. Pb-Free package per JEDEC J-STD-020B. Note: 1. Device available in Tape and Reel only. ©1991 Fairchild Semiconductor Corporation 74ABT245 Rev. 1.4 ...

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Connection Diagram Pin Descriptions Pin Names Description OE Output Enable Input (Active LOW) T/R Transmit/Receive Input A –A Side A Inputs or 3-STATE Outputs –B Side B Inputs or 3-STATE Outputs 0 7 Logic Diagram ©1991 Fairchild ...

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Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure ...

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DC Electrical Characteristics Symbol Parameter V Input HIGH Voltage IH V Input LOW Voltage IL V Input Clamp Diode Voltage CD V Output HIGH Voltage OH V Output LOW Voltage OL I Input HIGH Current IH I Input HIGH Current ...

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DC Electrical Characteristics SOIC package. Symbol Parameter V Quiet Output Maximum Dynamic V OLP V Quiet Output Minimum Dynamic V OLV V Minimum HIGH Level Dynamic OHV Output Voltage V Minimum HIGH Level Dynamic Input IHD Voltage V Maximum LOW ...

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Extended AC Electrical Characteristics SOIC package Outputs Switching Symbol Parameter Min. f Max Toggle TOGGLE Frequency t Propagation PLH Delay t Data to Outputs PHL t Output Enable PZH Time t PZL t Output Disable PHZ Time t ...

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Skew SOIC package. Symbol Parameter (10) t Pin to Pin Skew, HL Transitions OSHL (10) t Pin to Pin Skew, LH Transitions OSLH (14) t Duty Cycle, LH–HL Skew PS (10) t Pin to Pin Skew, LH/HL Transitions OST (11) ...

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AC Loading *Includes jig and probe capacitance Figure 1. Standard AC Test Load Amplitude 3.0V AC Waveforms Figure 4. Propagation Delay Waveforms for Inverting and Non-Inverting Functions Figure 5. Propagation Delay, Pulse Width Waveforms ©1991 Fairchild Semiconductor Corporation 74ABT245 Rev. ...

Page 9

Physical Dimensions Dimensions are in inches (millimeters) unless otherwise noted. Figure 8. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide ©1991 Fairchild Semiconductor Corporation 74ABT245 Rev. 1.4 Package Number M20B 9 www.fairchildsemi.com ...

Page 10

Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 9. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide ©1991 Fairchild Semiconductor Corporation 74ABT245 Rev. 1.4 Package Number M20D 10 www.fairchildsemi.com ...

Page 11

Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 10. 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide ©1991 Fairchild Semiconductor Corporation 74ABT245 Rev. 1.4 Package Number MSA20 11 www.fairchildsemi.com ...

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Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 11. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide ©1991 Fairchild Semiconductor Corporation 74ABT245 Rev. 1.4 Package Number MTC20 12 www.fairchildsemi.com ...

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TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ® ACEx Across the board. Around the world. ActiveArray Bottomless Build ...

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