HD151BF854SSEL RENESAS [Renesas Technology Corp], HD151BF854SSEL Datasheet
HD151BF854SSEL
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HD151BF854SSEL Summary of contents
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Cautions Keep safety first in your circuit designs! 1. Renesas Technology Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may ...
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... External feedback pin (FBIN) is used to synchronize the outputs to the clock input Supports 2.5 V analog supply voltage (AVDD), and 2.5 V VDD Ordering Information Part Name Package Type HD151BF854SSEL SSOP-28 pin Note: Please consult the sales office for the above package availability. HD151BF854 Package Code ...
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HD151BF854 Key Specifications Supply voltages: VDD = AVDD = 2.5 V±0.2 V Output clock cycle to cycle jitter = ±75 ps Output clock pin to pin skew = 150 ps Function Table Inputs AVDD CLK GND L GND H 2.5 ...
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Pin Arrangement VDD GND CLKIN AVDD AGND VDD (Top view) HD151BF854 GND ...
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HD151BF854 Pin Functions Pin name No. AGND 11 AVDD 10 CLKIN 8 FBIN 20 FBOUT 19 GND 6, 15, 28 VDD 3, 12 13, 17, 24 14, 16, 25 ...
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Logic Diagram CLKIN 20 FBIN Note: All inputs and outputs are associated with V Test Logic PLL = 2.5 V. DDQ HD151BF854 ...
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HD151BF854 Absolute Maximum Ratings Item Supply voltage Input voltage 1 Output voltage * Input clamp current Output clamp current Continuous output current Maximum power dissipation 55°C (in still air) Storage temperature Notes: Stresses beyond those listed under ...
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Electrical Characteristics Item Symbol Min Input clamp voltage V IK (All inputs) Output voltage Input current I I Analog supply current AI Dynamic supply current DI 2 Input capacitance Delta input capacitance* C ...
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HD151BF854 Switching Characteristics VDD = AVDD = 2.5V Item Symbol Period jitter t PER Half period jitter t HPER Cycle to cycle jitter t CC Static phase offset t sPE Output clock skew t sk Operating ...
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Note: 1. SDRAM Cin 3 Figure 1 Clock outputs test circuit Yn Yn tcycle (tcycle n) - (tcycle n+1) CC Figure 2 Cycle to cycle jitter Yx ...
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HD151BF854 Package Dimensions 10.2 10.4 Max 28 1 0.32± 0.08 0.30± 0.08 Dimension including the plating thickness Base material dimension Rev.4, Jan. 2003, page 0.65 0.13 M 7.9 ± 0.2 0.10 Hitachi Code JEDEC EIAJ ...
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Disclaimer 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise ...