SSTVF16859DGG PHILIPS [NXP Semiconductors], SSTVF16859DGG Datasheet

SSTVF16859DGG

Manufacturer Part Number

SSTVF16859DGG

Description

13-bit 1 : 2 SSTL_2 registered buffer for DDR

Manufacturer

PHILIPS [NXP Semiconductors]

Datasheet

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1. General description

The SSTVF16859 is a 13-bit to 26-bit SSTL_2 registered driver with differential clock

inputs, designed to operate between 2.3 V and 2.7 V for PC1600-PC2700 applications or

between 2.5 V and 2.7 V for PC3200 applications. All inputs are compatible with the

JEDEC standard for SSTL_2 with V

(RESET) input. All outputs are SSTL_2, Class II compatible, which can be used for

standard stub-series applications or capacitive loads. Master reset (RESET)

asynchronously resets all registers to zero.

The SSTVF16859 is intended to be incorporated into standard DIMM (Dual In-Line

Memory Module) designs deﬁned by JEDEC, such as DDR (Double Data Rate) SDRAM

and SDRAM II Memory Modules. Different from traditional SDRAM, DDR SDRAM

transfers data on both clock edges (rising and falling), thus doubling the peak bus

bandwidth. A DDR DRAM rated at 133 MHz will have a burst rate of 266 MHz.

The device data inputs consist of different receivers. One differential input is tied to the

input pin while the other is tied to a reference input pad, which is shared by all inputs.

The clock input is fully differential (CK and CK) to be compatible with DRAM devices that

are installed on the DIMM. Data are registered at the crossing of CK going HIGH, and CK

going LOW. However, since the control inputs to the SDRAM change at only half the data

rate, the device must only change state on the positive transition of the CK signal. In order

to be able to provide deﬁned outputs from the device even before a stable clock has been

supplied, the device has an asynchronous input pin (RESET), which when held to the

LOW state, resets all registers and all outputs to the LOW state.

The device supports low-power standby operation. When RESET is LOW, the differential

input receivers are disabled, and un-driven (ﬂoating) data, clock, and reference voltage

(VREF) inputs are allowed. In addition, when RESET is LOW, all registers are reset, and

all outputs are forced LOW. The LVCMOS RESET input must always be held at a valid

logic HIGH or LOW level.

To ensure deﬁned outputs from the register before a stable clock has been supplied,

RESET must be held in the LOW state during power-up.

In the DDR DIMM application, RESET is speciﬁed to be completely asynchronous with

respect to CK and CK. Therefore, no timing relationship can be guaranteed between the

two. When entering RESET, the register will be cleared and the outputs will be driven

LOW. As long as the data inputs are LOW, and the clock is stable during the time from the

LOW-to-HIGH transition of RESET until the input receivers are fully enabled, the outputs

will remain LOW.

SSTVF16859

13-bit 1 : 2 SSTL_2 registered buffer for DDR

Rev. 02 — 19 July 2005

ref

normally at 0.5

Product data sheet

, except the LVCMOS reset

Related parts for SSTVF16859DGG

SSTVF16859DGG Summary of contents

Page 1

SSTVF16859 13-bit SSTL_2 registered buffer for DDR Rev. 02 — 19 July 2005 1. General description The SSTVF16859 is a 13-bit to 26-bit SSTL_2 registered driver with differential clock inputs, designed to operate between 2.3 V and ...

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... MHz Ordering information Table +70 C amb Type number SSTVF16859BS SSTVF16859DGG TSSOP64 plastic thin shrink small outline package; 64 leads; SSTVF16859EC 9397 750 15157 Product data sheet Quick reference data = 2.5 ns amb r f Parameter propagation delay, ...

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Philips Semiconductors 5. Functional diagram Fig 1. Logic diagram of SSTVF16859 6. Pinning information 6.1 Pinning Fig 2. Pin conﬁguration for HVQFN56 9397 750 15157 Product data sheet 13-bit SSTL_2 registered buffer for DDR RESET CK CK ...

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... Q12A Q11A 3 Q10A 4 5 Q9A GND 7 Q8A 8 9 Q7A Q6A 10 Q5A 11 12 Q4A 13 Q3A Q2A 14 GND 15 16 Q1A SSTVF16859DGG Q13B Q12B 19 20 Q11B Q10B 21 Q9B 22 23 Q8B 24 Q7B Q6B 25 GND Q5B 28 Q4B 29 30 Q3B 31 Q2B ...

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Philips Semiconductors Fig 4. Pin conﬁguration for LFBGA96 Fig 5. Ball mapping for LFBGA96 9397 750 15157 Product data sheet ball A1 index area n.c. n. Q12A Q13A ...

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Philips Semiconductors 6.2 Pin description Table 3: Pin description Symbol Pin TSSOP64 HVQFN56 Q1A 16 7 Q2A 14 6 Q3A 13 5 Q4A 12 4 Q5A 11 3 Q6A 10 2 Q7A 9 1 Q8A 8 56 Q9A 5 54 ...

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Philips Semiconductors Table 3: Pin description …continued Symbol Pin TSSOP64 HVQFN56 D10 56 ...

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Philips Semiconductors 8. Limiting values Table 5: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage DD V input voltage I V output voltage O I input clamp current IK I output ...

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Philips Semiconductors 10. Static characteristics Table 7: Static characteristics (PC1600-PC2700 +70 C; over recommended operating conditions; voltages are referenced to GND (ground = 0 V); amb unless otherwise speciﬁed. Symbol Parameter V input clamping voltage ...

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Philips Semiconductors Table 8: Static characteristics (PC3200) At recommended operating conditions; T unless otherwise speciﬁed. Symbol Parameter V input clamping voltage IK V HIGH-level output voltage LOW-level output voltage OL I input current (all inputs ...

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Philips Semiconductors 11. Dynamic characteristics Table 9: Timing requirements (PC1600-PC2700) At recommended operating conditions; V See Figure 11. Symbol Parameter f clock frequency clock t pulse duration, CK, CK, HIGH or W LOW t differential inputs active time ACT t ...

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Philips Semiconductors Table 11: Switching characteristics (PC1600-PC2700) At recommended operating conditions pF; unless otherwise speciﬁed. See L Symbol Parameter f maximum input clock frequency MAX t propagation delay PD t propagation delay, simultaneous switching PDMSS t ...

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Philips Semiconductors Fig 8. Propagation delay times (clock to output) Fig 9. Propagation delay times (reset to output) Fig 10. Setup and hold times 9397 750 15157 Product data sheet CK V ICR CK t PLH output ...

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Philips Semiconductors 12. Test information (1) C Fig 11. Load circuit 9397 750 15157 Product data sheet m output under test includes probe and jig capacitance. L Rev. 02 — 19 July 2005 SSTVF16859 13-bit SSTL_2 registered ...

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Philips Semiconductors 13. Package outline TSSOP64: plastic thin shrink small outline package; 64 leads; body width 6 pin 1 index 1 DIMENSIONS (mm are the original dimensions). A UNIT max. ...

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Philips Semiconductors LFBGA96: plastic low profile fine-pitch ball grid array package; 96 balls; body 13.5 x 5.5 x 1.05 mm ball A1 index area ...

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Philips Semiconductors HVQFN56: plastic thermal enhanced very thin quad flat package; no leads; 56 terminals; body 0.85 mm terminal 1 index area terminal 1 56 index area DIMENSIONS (mm are ...

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Philips Semiconductors 14. Soldering 14.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages ...

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Philips Semiconductors – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, ...

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Philips Semiconductors [4] These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, ...

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Philips Semiconductors 16. Revision history Table 15: Revision history Document ID Release date SSTVF16859_2 20050719 • Modiﬁcations: The format of this data sheet has been redesigned to comply with the new presentation and information standard of Philips Semiconductors. • Table ...

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Philips Semiconductors 17. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualiﬁcation III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...

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Philips Semiconductors 22. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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