AT88SC0808CA-SH ATMEL [ATMEL Corporation], AT88SC0808CA-SH Datasheet - Page 4

• Manufacturer Part Number: AT88SC0808CA-SH
• Description: Atmel CryptoMemory
• Manufacturer: ATMEL [ATMEL Corporation]

2.
3.
3.1
3.2
3.3
3.4
Figure 2-1. Connection Diagram
Pin Descriptions
Supply Voltage (V
The V
Clock (SCL/CLK)
When using the asynchronous T = 0 protocol, the CLK (SCL) input provides the device with a carrier frequency f. The nominal
length of one bit emitted on I/O is defined as an “elementary time unit” (ETU) and is equal to 372/ f.
When using the synchronous protocol, data clocking is done on the positive edge of the clock when writing to the device and
on the negative edge of the clock when reading from the device.
Reset (RST)
The AT88SC0808CA provides an ISO 7816-3 compliant asynchronous answer-to-reset (ATR) sequence. Upon activation of
the reset sequence, the device outputs bytes contained in the 64-bit ATR register. An internal pull-up on the RST input pad
allows the device to operate in synchronous mode without bonding RST. The AT88SC0808CA does not support an ATR
sequence in the synchronous mode of operation.
Serial Data (SDA/IO)
The SDA/IO pin is bidirectional for serial data transfer. This pin is open-drain driven and may be wired with any number of
other open-drain or open-collector devices. An external pull-up resistor should be connected between SDA/IO and V
value of this resistor and the system capacitance loading the SDA/IO bus will determine the rise time of SDA/IO. This rise time
will determine the maximum frequency during read operations. Low value pull-up resistors will allow higher frequency
operations while drawing higher average power supply current. SDA/IO information applies to both asynchronous and
synchronous protocols.
Connection Diagram
CC
Microprocessor
input is a 2.7V to 3.6V positive voltage supplied by the host.
CC
)
2.7v - 5.5v
Atmel AT88SC0808CA [Summary DATASHEET]
SDA
SCL
CryptoMemory
2.7v - 3.6v
5204FS−CRYPTO−12/11
CC
. The
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