W942508CH-5 WINBOND [Winbond], W942508CH-5 Datasheet

W942508CH-5

Manufacturer Part Number

W942508CH-5

Description

8M x 4 BANKS x 8 BIT DDR SDRAM

Manufacturer

WINBOND [Winbond]

Datasheet

1.W942508CH-5.pdf (47 pages)

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Table of Contents-

10.

7.1

7.2

7.3

7.4

7.5

7.6

7.7

8.1

8.2

8.3

8.4

9.1

9.2

9.3

9.4

9.5

9.6

9.7

9.8

9.9

TIMING WAVEFORMS ............................................................................................................. 29

10.1

10.2

10.3

10.4

10.5

GENERAL DESCRIPTION .................................................................................................. 3

FEATURES .......................................................................................................................... 3

KEY PARAMETERS ............................................................................................................ 4

PIN CONFIGURATION ........................................................................................................ 5

PIN DESCRIPTION.............................................................................................................. 6

BLOCK DIAGRAM ............................................................................................................... 7

ELECTRICAL CHARACTERISTICS .................................................................................... 8

Absolute Maximum Ratings ................................................................................................. 8

Recommended DC Operating Conditions............................................................................ 8

Capacitance ......................................................................................................................... 9

Leakage and Output Buffer Characteristics ......................................................................... 9

DC Characteristics ............................................................................................................. 10

AC Characteristics and Operating Condition ..................................................................... 11

AC Test Conditions ............................................................................................................ 13

Operation Mode ................................................................................................................. 15

Simplified Truth Table ........................................................................................................ 15

Function Truth Table .......................................................................................................... 16

Function Truth Table for CKE ............................................................................................ 19

Simplified State Diagram.................................................................................................... 20

FUNCTIONAL DESCRIPTION........................................................................................... 21

Power Up Sequence .......................................................................................................... 21

Command Function............................................................................................................ 21

Read Operation.................................................................................................................. 24

Write Operation .................................................................................................................. 24

Precharge........................................................................................................................... 24

Burst Termination............................................................................................................... 25

Refresh Operation.............................................................................................................. 25

Power Down Mode............................................................................................................. 25

Mode Register Operation ................................................................................................... 25

Command Input Timing...................................................................................................... 29

Timing of the CLK Signals.................................................................................................. 29

Read Timing (Burst Length = 4) ......................................................................................... 30

Write Timing (Burst Length = 4) ......................................................................................... 31

DM, DATA MASK (W942508CH/W942504CH) ................................................................. 32

8M × 4 BANKS × 8 BIT DDR SDRAM

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Publication Release Date: May 21, 2003

W942508CH

Revision A3

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