HYB39S256400T-10 SIEMENS [Siemens Semiconductor Group], HYB39S256400T-10 Datasheet - Page 4

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HYB39S256400T-10

Manufacturer Part Number
HYB39S256400T-10
Description
256 MBit Synchronous DRAM
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
Block Diagram for 64 M
Semiconductor Group
*) on SSTL versions only
Address Counter
Column
Decoder
Memory
Bank 0
8196 x
2048 x
Array
Row
4 Bit
4 SDRAM (13/11/2 addressing)
Column Addresses
A0 - A9, A11, AP
Address Buffer
BA0, BA1
Column
Decoder
Memory
Bank 1
8196 x
2048 x
Array
Row
4 Bit
Input Buffer
4
DQ0 - DQ3
CLK CKE CS RAS CAS WE DQM V
Output Buffer
Control Logic & Timing Generator
Row Addresses
Row Address
256 MBit Synchronous DRAM
BA0, BA1
A0 - A12,
Decoder
Memory
Bank 2
8196 x
2048 x
Buffer
Array
Row
4 Bit
HYB 39S256400/800/160T
Counter
Refresh
Decoder
Memory
Bank 3
8196 x
2048 x
Array
Row
4 Bit
SPB03781
REF
1998-10-01
*)

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