HYB39S256400T-10 SIEMENS [Siemens Semiconductor Group], HYB39S256400T-10 Datasheet - Page 5

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HYB39S256400T-10

Manufacturer Part Number
HYB39S256400T-10
Description
256 MBit Synchronous DRAM
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
Block Diagram for 32 M
Semiconductor Group
*) on SSTL versions only
Address Counter
Column
Decoder
Memory
Bank 0
1024 x
8192 x
Array
Row
8 Bit
8 SDRAM (13/10/2 addressing)
Column Addresses
Address Buffer
A0 - A9, AP,
BA0, BA1
Column
Decoder
Memory
1024 x
8192 x
Bank 1
Array
Row
8 Bit
Input Buffer
5
DQ0 - DQ7
CLK CKE CS RAS CAS WE DQM V
Output Buffer
Control Logic & Timing Generator
Row Addresses
256 MBit Synchronous DRAM
Row Address
A0 - A12,
BA0, BA1
Decoder
Memory
Bank 2
1024 x
8192 x
Buffer
Array
Row
8 Bit
HYB 39S256400/800/160T
Refresh
Counter
Decoder
Memory
Bank 3
8192 x
1024 x
Array
Row
8 Bit
SPB03780
1998-10-01
*)

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