M58BW032BB45T3T STMICROELECTRONICS [STMicroelectronics], M58BW032BB45T3T Datasheet - Page 40

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M58BW032BB45T3T

Manufacturer Part Number
M58BW032BB45T3T
Description
32 Mbit (1Mb x32, Boot Block, Burst) 3.3V Supply Flash Memory
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
M58BW032BT, M58BW032BB, M58BW032DT, M58BW032DB
Table 20. Synchronous Burst Read AC Characteristics
Note: 1. Data output should be read on the valid clock edge.
Figure 14. Synchronous Burst Read (Data Valid from ’n’ Clock Rising Edge)
Note: For set up signals and timings see Synchronous Burst Read.
40/60
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
BHKH
GLQV
KHQX
KHQV
BLKH
KHAX
KHLX
RLKH
KHLL
LLKH
AVLL
ELLL
2. For other timings see
K
DQ0-DQ31
Note: n depends on Burst X-Latency
tKHQV
Address Valid to Latch Enable Low
Burst Address Advance High to Valid Clock
Edge
Burst Address Advance Low to Valid Clock
Edge
Chip Enable Low to Latch Enable low
Output Enable Low to Output Valid
Valid Clock Edge to Address Transition
Valid Clock Edge to Latch Enable Low
Valid Clock Edge to Latch Enable Transition
Valid Clock Edge to Output Transition
Latch Enable Low to Valid Clock Edge
Valid Data Ready Low to Valid Clock Edge
Valid Clock Edge to Output Valid
SETUP
Table 16., Asynchronous Bus Read AC
Q0
Parameter
n
tKHQX
Q1
n+1
Burst Read
Q0 to Q3
Q2
n+2
Q3
Characteristics..
n+3
E = V
E = V
E = V
E = V
E = V
E = V
Test Condition
L = V
L = V
L = V
L = V
L = V
E = V
E = V
E = V
E = V
E = V
IL
IL
IL
IL
IL
IL
, G = V
, G = V
, G = V
, G = V
, G = V
, L = V
Q4
n+4
IH
IH
IH
IH
IH
IL
IL
IL
IL
IL
IL
IL
IH
IL
IL
IL
,
,
,
,
,
Q5
n+5
Max
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
45
10
0
8
8
0
5
0
0
0
6
6
8
M58BW032
55
10
0
8
8
0
5
0
0
0
6
6
8
AI04408c
60
10
0
8
8
0
5
0
0
0
6
6
8
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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